80  * @dd: pointer to the dpll data structure
90 static void omap4_dpll_lpmode_recalc(struct dpll_data *dd)  in omap4_dpll_lpmode_recalc()  argument
94 	fint = clk_hw_get_rate(dd->clk_ref) / (dd->last_rounded_n + 1);  in omap4_dpll_lpmode_recalc()
95 	fout = fint * dd->last_rounded_m;  in omap4_dpll_lpmode_recalc()
98 		dd->last_rounded_lpmode = 1;  in omap4_dpll_lpmode_recalc()
100 		dd->last_rounded_lpmode = 0;  in omap4_dpll_lpmode_recalc()
119 	struct dpll_data *dd;  in omap4_dpll_regm4xen_recalc()  local
124 	dd = clk->dpll_data;  in omap4_dpll_regm4xen_recalc()
129 	v = ti_clk_ll_ops->clk_readl(&dd->control_reg);  in omap4_dpll_regm4xen_recalc()
150 	struct dpll_data *dd;  in omap4_dpll_regm4xen_determine_rate()  local
155 	dd = clk->dpll_data;  in omap4_dpll_regm4xen_determine_rate()
156 	if (!dd)  in omap4_dpll_regm4xen_determine_rate()
159 	if (clk_hw_get_rate(dd->clk_bypass) == req->rate &&  in omap4_dpll_regm4xen_determine_rate()
160 	    (dd->modes & (1 << DPLL_LOW_POWER_BYPASS))) {  in omap4_dpll_regm4xen_determine_rate()
161 		req->best_parent_hw = dd->clk_bypass;  in omap4_dpll_regm4xen_determine_rate()
167 		dd->last_rounded_m4xen = 0;  in omap4_dpll_regm4xen_determine_rate()
186 			dd->last_rounded_rate *= OMAP4430_REGM4XEN_MULT;  in omap4_dpll_regm4xen_determine_rate()
187 			dd->last_rounded_m4xen = 1;  in omap4_dpll_regm4xen_determine_rate()
190 		omap4_dpll_lpmode_recalc(dd);  in omap4_dpll_regm4xen_determine_rate()
192 		req->rate = dd->last_rounded_rate;  in omap4_dpll_regm4xen_determine_rate()
193 		req->best_parent_hw = dd->clk_ref;  in omap4_dpll_regm4xen_determine_rate()