Lines Matching refs:TI_CLK_MUX

73 	{ 24, TI_CLK_MUX, omap4_func_dmic_abe_gfclk_parents, NULL },
74 	{ 26, TI_CLK_MUX, omap4_dmic_sync_mux_ck_parents, NULL },
86 	{ 24, TI_CLK_MUX, omap4_func_mcasp_abe_gfclk_parents, NULL },
87 	{ 26, TI_CLK_MUX, omap4_dmic_sync_mux_ck_parents, NULL },
99 	{ 24, TI_CLK_MUX, omap4_func_mcbsp1_gfclk_parents, NULL },
100 	{ 26, TI_CLK_MUX, omap4_dmic_sync_mux_ck_parents, NULL },
112 	{ 24, TI_CLK_MUX, omap4_func_mcbsp2_gfclk_parents, NULL },
113 	{ 26, TI_CLK_MUX, omap4_dmic_sync_mux_ck_parents, NULL },
125 	{ 24, TI_CLK_MUX, omap4_func_mcbsp3_gfclk_parents, NULL },
126 	{ 26, TI_CLK_MUX, omap4_dmic_sync_mux_ck_parents, NULL },
165 	{ 24, TI_CLK_MUX, omap4_timer5_sync_mux_parents, NULL },
170 	{ 24, TI_CLK_MUX, omap4_timer5_sync_mux_parents, NULL },
175 	{ 24, TI_CLK_MUX, omap4_timer5_sync_mux_parents, NULL },
180 	{ 24, TI_CLK_MUX, omap4_timer5_sync_mux_parents, NULL },
334 	{ 24, TI_CLK_MUX, omap4_sgx_clk_mux_parents, NULL },
350 	{ 24, TI_CLK_MUX, omap4_hsmmc1_fclk_parents, NULL },
355 	{ 24, TI_CLK_MUX, omap4_hsmmc1_fclk_parents, NULL },
415 	{ 24, TI_CLK_MUX, omap4_utmi_p1_gfclk_parents, NULL },
416 	{ 25, TI_CLK_MUX, omap4_utmi_p2_gfclk_parents, NULL },
433 	{ 24, TI_CLK_MUX, omap4_otg_60m_gfclk_parents, NULL },
473 	{ 24, TI_CLK_MUX, omap4_cm2_dm10_mux_parents, NULL },
478 	{ 24, TI_CLK_MUX, omap4_cm2_dm10_mux_parents, NULL },
483 	{ 24, TI_CLK_MUX, omap4_cm2_dm10_mux_parents, NULL },
488 	{ 24, TI_CLK_MUX, omap4_cm2_dm10_mux_parents, NULL },
493 	{ 24, TI_CLK_MUX, omap4_cm2_dm10_mux_parents, NULL },
498 	{ 24, TI_CLK_MUX, omap4_cm2_dm10_mux_parents, NULL },
545 	{ 24, TI_CLK_MUX, omap4_per_mcbsp4_gfclk_parents, NULL },
546 	{ 26, TI_CLK_MUX, omap4_mcbsp4_sync_mux_ck_parents, NULL },
625 	{ 24, TI_CLK_MUX, omap4_cm2_dm10_mux_parents, NULL },
675 	{ 20, TI_CLK_MUX, omap4_pmd_stm_clock_mux_ck_parents, NULL },
676 	{ 22, TI_CLK_MUX, omap4_pmd_stm_clock_mux_ck_parents, NULL },