1 // SPDX-License-Identifier: GPL-2.0-only
5 #include <linux/clk-provider.h>
175 static const char *ti_adpll_clk_get_name(struct ti_adpll_data *d,  in ti_adpll_clk_get_name()  argument
183 		err = of_property_read_string_index(d->np,  in ti_adpll_clk_get_name()
184 						    "clock-output-names",  in ti_adpll_clk_get_name()
190 		name = devm_kasprintf(d->dev, GFP_KERNEL, "%08lx.adpll.%s",  in ti_adpll_clk_get_name()
191 				      d->pa, postfix);  in ti_adpll_clk_get_name()
199 static int ti_adpll_setup_clock(struct ti_adpll_data *d, struct clk *clock,  in ti_adpll_setup_clock()  argument
207 	d->clocks[index].clk = clock;  in ti_adpll_setup_clock()
208 	d->clocks[index].unregister = unregister;  in ti_adpll_setup_clock()
214 			dev_warn(d->dev, "clock %s con_id lookup may fail\n",  in ti_adpll_setup_clock()
216 		snprintf(con_id, 16, "pll%03lx%s", d->pa & 0xfff, postfix + 1);  in ti_adpll_setup_clock()
219 			return -ENOMEM;  in ti_adpll_setup_clock()
220 		d->clocks[index].cl = cl;  in ti_adpll_setup_clock()
222 		dev_warn(d->dev, "no con_id for clock %s\n", name);  in ti_adpll_setup_clock()
228 	d->outputs.clks[output_index] = clock;  in ti_adpll_setup_clock()
229 	d->outputs.clk_num++;  in ti_adpll_setup_clock()
234 static int ti_adpll_init_divider(struct ti_adpll_data *d,  in ti_adpll_init_divider()  argument
246 	child_name = ti_adpll_clk_get_name(d, output_index, name);  in ti_adpll_init_divider()
248 		return -EINVAL;  in ti_adpll_init_divider()
251 	clock = clk_register_divider(d->dev, child_name, parent_name, 0,  in ti_adpll_init_divider()
253 				     &d->lock);  in ti_adpll_init_divider()
255 		dev_err(d->dev, "failed to register divider %s: %li\n",  in ti_adpll_init_divider()
260 	return ti_adpll_setup_clock(d, clock, index, output_index, child_name,  in ti_adpll_init_divider()
264 static int ti_adpll_init_mux(struct ti_adpll_data *d,  in ti_adpll_init_mux()  argument
275 	child_name = ti_adpll_clk_get_name(d, -ENODEV, name);  in ti_adpll_init_mux()
277 		return -ENOMEM;  in ti_adpll_init_mux()
280 	clock = clk_register_mux(d->dev, child_name, parents, 2, 0,  in ti_adpll_init_mux()
281 				 reg, shift, 1, 0, &d->lock);  in ti_adpll_init_mux()
283 		dev_err(d->dev, "failed to register mux %s: %li\n",  in ti_adpll_init_mux()
288 	return ti_adpll_setup_clock(d, clock, index, -ENODEV, child_name,  in ti_adpll_init_mux()
292 static int ti_adpll_init_gate(struct ti_adpll_data *d,  in ti_adpll_init_gate()  argument
304 	child_name = ti_adpll_clk_get_name(d, output_index, name);  in ti_adpll_init_gate()
306 		return -EINVAL;  in ti_adpll_init_gate()
309 	clock = clk_register_gate(d->dev, child_name, parent_name, 0,  in ti_adpll_init_gate()
311 				  &d->lock);  in ti_adpll_init_gate()
313 		dev_err(d->dev, "failed to register gate %s: %li\n",  in ti_adpll_init_gate()
318 	return ti_adpll_setup_clock(d, clock, index, output_index, child_name,  in ti_adpll_init_gate()
322 static int ti_adpll_init_fixed_factor(struct ti_adpll_data *d,  in ti_adpll_init_fixed_factor()  argument
333 	child_name = ti_adpll_clk_get_name(d, -ENODEV, name);  in ti_adpll_init_fixed_factor()
335 		return -ENOMEM;  in ti_adpll_init_fixed_factor()
338 	clock = clk_register_fixed_factor(d->dev, child_name, parent_name,  in ti_adpll_init_fixed_factor()
343 	return ti_adpll_setup_clock(d, clock, index, -ENODEV, child_name,  in ti_adpll_init_fixed_factor()
347 static void ti_adpll_set_idle_bypass(struct ti_adpll_data *d)  in ti_adpll_set_idle_bypass()  argument
352 	spin_lock_irqsave(&d->lock, flags);  in ti_adpll_set_idle_bypass()
353 	v = readl_relaxed(d->regs + ADPLL_CLKCTRL_OFFSET);  in ti_adpll_set_idle_bypass()
355 	writel_relaxed(v, d->regs + ADPLL_CLKCTRL_OFFSET);  in ti_adpll_set_idle_bypass()
356 	spin_unlock_irqrestore(&d->lock, flags);  in ti_adpll_set_idle_bypass()
359 static void ti_adpll_clear_idle_bypass(struct ti_adpll_data *d)  in ti_adpll_clear_idle_bypass()  argument
364 	spin_lock_irqsave(&d->lock, flags);  in ti_adpll_clear_idle_bypass()
365 	v = readl_relaxed(d->regs + ADPLL_CLKCTRL_OFFSET);  in ti_adpll_clear_idle_bypass()
367 	writel_relaxed(v, d->regs + ADPLL_CLKCTRL_OFFSET);  in ti_adpll_clear_idle_bypass()
368 	spin_unlock_irqrestore(&d->lock, flags);  in ti_adpll_clear_idle_bypass()
371 static bool ti_adpll_clock_is_bypass(struct ti_adpll_data *d)  in ti_adpll_clock_is_bypass()  argument
375 	v = readl_relaxed(d->regs + ADPLL_STATUS_OFFSET);  in ti_adpll_clock_is_bypass()
385 static bool ti_adpll_is_locked(struct ti_adpll_data *d)  in ti_adpll_is_locked()  argument
387 	u32 v = readl_relaxed(d->regs + ADPLL_STATUS_OFFSET);  in ti_adpll_is_locked()
392 static int ti_adpll_wait_lock(struct ti_adpll_data *d)  in ti_adpll_wait_lock()  argument
397 		if (ti_adpll_is_locked(d))  in ti_adpll_wait_lock()
400 	} while (retries--);  in ti_adpll_wait_lock()
402 	dev_err(d->dev, "pll failed to lock\n");  in ti_adpll_wait_lock()
403 	return -ETIMEDOUT;  in ti_adpll_wait_lock()
409 	struct ti_adpll_data *d = to_adpll(dco);  in ti_adpll_prepare()  local
411 	ti_adpll_clear_idle_bypass(d);  in ti_adpll_prepare()
412 	ti_adpll_wait_lock(d);  in ti_adpll_prepare()
420 	struct ti_adpll_data *d = to_adpll(dco);  in ti_adpll_unprepare()  local
422 	ti_adpll_set_idle_bypass(d);  in ti_adpll_unprepare()
428 	struct ti_adpll_data *d = to_adpll(dco);  in ti_adpll_is_prepared()  local
430 	return ti_adpll_is_locked(d);  in ti_adpll_is_prepared()
441 	struct ti_adpll_data *d = to_adpll(dco);  in ti_adpll_recalc_rate()  local
446 	if (ti_adpll_clock_is_bypass(d))  in ti_adpll_recalc_rate()
449 	spin_lock_irqsave(&d->lock, flags);  in ti_adpll_recalc_rate()
450 	frac_m = readl_relaxed(d->regs + ADPLL_FRACDIV_OFFSET);  in ti_adpll_recalc_rate()
452 	rate = (u64)readw_relaxed(d->regs + ADPLL_MN2DIV_OFFSET) << 18;  in ti_adpll_recalc_rate()
455 	divider = (readw_relaxed(d->regs + ADPLL_M2NDIV_OFFSET) + 1) << 18;  in ti_adpll_recalc_rate()
456 	spin_unlock_irqrestore(&d->lock, flags);  in ti_adpll_recalc_rate()
460 	if (d->c->is_type_s) {  in ti_adpll_recalc_rate()
461 		v = readl_relaxed(d->regs + ADPLL_CLKCTRL_OFFSET);  in ti_adpll_recalc_rate()
484 static int ti_adpll_init_dco(struct ti_adpll_data *d)  in ti_adpll_init_dco()  argument
491 	d->outputs.clks = devm_kcalloc(d->dev,  in ti_adpll_init_dco()
495 	if (!d->outputs.clks)  in ti_adpll_init_dco()
496 		return -ENOMEM;  in ti_adpll_init_dco()
498 	if (d->c->output_index < 0)  in ti_adpll_init_dco()
503 	init.name = ti_adpll_clk_get_name(d, d->c->output_index, postfix);  in ti_adpll_init_dco()
505 		return -EINVAL;  in ti_adpll_init_dco()
507 	init.parent_names = d->parent_names;  in ti_adpll_init_dco()
508 	init.num_parents = d->c->nr_max_inputs;  in ti_adpll_init_dco()
511 	d->dco.hw.init = &init;  in ti_adpll_init_dco()
513 	if (d->c->is_type_s)  in ti_adpll_init_dco()
519 	err = ti_adpll_init_divider(d, TI_ADPLL_N2, -ENODEV, "n2",  in ti_adpll_init_dco()
520 				    d->parent_clocks[TI_ADPLL_CLKINP],  in ti_adpll_init_dco()
521 				    d->regs + ADPLL_MN2DIV_OFFSET,  in ti_adpll_init_dco()
526 	clock = devm_clk_register(d->dev, &d->dco.hw);  in ti_adpll_init_dco()
530 	return ti_adpll_setup_clock(d, clock, TI_ADPLL_DCO, d->c->output_index,  in ti_adpll_init_dco()
537 	struct clk_hw *gate_hw = &co->gate.hw;  in ti_adpll_clkout_enable()
547 	struct clk_hw *gate_hw = &co->gate.hw;  in ti_adpll_clkout_disable()
556 	struct clk_hw *gate_hw = &co->gate.hw;  in ti_adpll_clkout_is_enabled()
567 	struct ti_adpll_data *d = co->adpll;  in ti_adpll_clkout_get_parent()  local
569 	return ti_adpll_clock_is_bypass(d);  in ti_adpll_clkout_get_parent()
572 static int ti_adpll_init_clkout(struct ti_adpll_data *d,  in ti_adpll_init_clkout()  argument
586 	co = devm_kzalloc(d->dev, sizeof(*co), GFP_KERNEL);  in ti_adpll_init_clkout()
588 		return -ENOMEM;  in ti_adpll_init_clkout()
589 	co->adpll = d;  in ti_adpll_init_clkout()
591 	err = of_property_read_string_index(d->np,  in ti_adpll_init_clkout()
592 					    "clock-output-names",  in ti_adpll_init_clkout()
598 	ops = devm_kzalloc(d->dev, sizeof(*ops), GFP_KERNEL);  in ti_adpll_init_clkout()
600 		return -ENOMEM;  in ti_adpll_init_clkout()
605 	co->hw.init = &init;  in ti_adpll_init_clkout()
611 	ops->get_parent = ti_adpll_clkout_get_parent;  in ti_adpll_init_clkout()
612 	ops->determine_rate = __clk_mux_determine_rate;  in ti_adpll_init_clkout()
614 		co->gate.lock = &d->lock;  in ti_adpll_init_clkout()
615 		co->gate.reg = d->regs + ADPLL_CLKCTRL_OFFSET;  in ti_adpll_init_clkout()
616 		co->gate.bit_idx = gate_bit;  in ti_adpll_init_clkout()
617 		ops->enable = ti_adpll_clkout_enable;  in ti_adpll_init_clkout()
618 		ops->disable = ti_adpll_clkout_disable;  in ti_adpll_init_clkout()
619 		ops->is_enabled = ti_adpll_clkout_is_enabled;  in ti_adpll_init_clkout()
622 	clock = devm_clk_register(d->dev, &co->hw);  in ti_adpll_init_clkout()
624 		dev_err(d->dev, "failed to register output %s: %li\n",  in ti_adpll_init_clkout()
629 	return ti_adpll_setup_clock(d, clock, index, output_index, child_name,  in ti_adpll_init_clkout()
633 static int ti_adpll_init_children_adpll_s(struct ti_adpll_data *d)  in ti_adpll_init_children_adpll_s()  argument
637 	if (!d->c->is_type_s)  in ti_adpll_init_children_adpll_s()
641 	err = ti_adpll_init_mux(d, TI_ADPLL_BYPASS, "bypass",  in ti_adpll_init_children_adpll_s()
642 				d->clocks[TI_ADPLL_N2].clk,  in ti_adpll_init_children_adpll_s()
643 				d->parent_clocks[TI_ADPLL_CLKINPULOW],  in ti_adpll_init_children_adpll_s()
644 				d->regs + ADPLL_CLKCTRL_OFFSET,  in ti_adpll_init_children_adpll_s()
650 	err = ti_adpll_init_divider(d, TI_ADPLL_M2, -ENODEV, "m2",  in ti_adpll_init_children_adpll_s()
651 				    d->clocks[TI_ADPLL_DCO].clk,  in ti_adpll_init_children_adpll_s()
652 				    d->regs + ADPLL_M2NDIV_OFFSET,  in ti_adpll_init_children_adpll_s()
660 	err = ti_adpll_init_fixed_factor(d, TI_ADPLL_DIV2, "div2",  in ti_adpll_init_children_adpll_s()
661 					 d->clocks[TI_ADPLL_M2].clk,  in ti_adpll_init_children_adpll_s()
667 	err = ti_adpll_init_clkout(d, TI_ADPLL_CLKOUT, TI_ADPLL_S_CLKOUT,  in ti_adpll_init_children_adpll_s()
669 				   d->clocks[TI_ADPLL_DIV2].clk,  in ti_adpll_init_children_adpll_s()
670 				   d->clocks[TI_ADPLL_BYPASS].clk);  in ti_adpll_init_children_adpll_s()
675 	err = ti_adpll_init_clkout(d, TI_ADPLL_CLKOUT2, TI_ADPLL_S_CLKOUTX2, 0,  in ti_adpll_init_children_adpll_s()
676 				   "clkout2", d->clocks[TI_ADPLL_M2].clk,  in ti_adpll_init_children_adpll_s()
677 				   d->clocks[TI_ADPLL_BYPASS].clk);  in ti_adpll_init_children_adpll_s()
682 	if (d->parent_clocks[TI_ADPLL_CLKINPHIF]) {  in ti_adpll_init_children_adpll_s()
683 		err = ti_adpll_init_mux(d, TI_ADPLL_HIF, "hif",  in ti_adpll_init_children_adpll_s()
684 					d->clocks[TI_ADPLL_DCO].clk,  in ti_adpll_init_children_adpll_s()
685 					d->parent_clocks[TI_ADPLL_CLKINPHIF],  in ti_adpll_init_children_adpll_s()
686 					d->regs + ADPLL_CLKCTRL_OFFSET,  in ti_adpll_init_children_adpll_s()
693 	err = ti_adpll_init_divider(d, TI_ADPLL_M3, TI_ADPLL_S_CLKOUTHIF, "m3",  in ti_adpll_init_children_adpll_s()
694 				    d->clocks[TI_ADPLL_HIF].clk,  in ti_adpll_init_children_adpll_s()
695 				    d->regs + ADPLL_M3DIV_OFFSET,  in ti_adpll_init_children_adpll_s()
707 static int ti_adpll_init_children_adpll_lj(struct ti_adpll_data *d)  in ti_adpll_init_children_adpll_lj()  argument
711 	if (d->c->is_type_s)  in ti_adpll_init_children_adpll_lj()
715 	err = ti_adpll_init_gate(d, TI_ADPLL_DCO_GATE, TI_ADPLL_LJ_CLKDCOLDO,  in ti_adpll_init_children_adpll_lj()
716 				 "clkdcoldo", d->clocks[TI_ADPLL_DCO].clk,  in ti_adpll_init_children_adpll_lj()
717 				 d->regs + ADPLL_CLKCTRL_OFFSET,  in ti_adpll_init_children_adpll_lj()
723 	err = ti_adpll_init_divider(d, TI_ADPLL_M2, -ENODEV,  in ti_adpll_init_children_adpll_lj()
724 				    "m2", d->clocks[TI_ADPLL_DCO].clk,  in ti_adpll_init_children_adpll_lj()
725 				    d->regs + ADPLL_M2NDIV_OFFSET,  in ti_adpll_init_children_adpll_lj()
733 	err = ti_adpll_init_gate(d, TI_ADPLL_M2_GATE, TI_ADPLL_LJ_CLKOUTLDO,  in ti_adpll_init_children_adpll_lj()
734 				 "clkoutldo", d->clocks[TI_ADPLL_M2].clk,  in ti_adpll_init_children_adpll_lj()
735 				 d->regs + ADPLL_CLKCTRL_OFFSET,  in ti_adpll_init_children_adpll_lj()
742 	err = ti_adpll_init_mux(d, TI_ADPLL_BYPASS, "bypass",  in ti_adpll_init_children_adpll_lj()
743 				d->clocks[TI_ADPLL_N2].clk,  in ti_adpll_init_children_adpll_lj()
744 				d->parent_clocks[TI_ADPLL_CLKINPULOW],  in ti_adpll_init_children_adpll_lj()
745 				d->regs + ADPLL_CLKCTRL_OFFSET,  in ti_adpll_init_children_adpll_lj()
751 	err = ti_adpll_init_clkout(d, TI_ADPLL_CLKOUT, TI_ADPLL_S_CLKOUT,  in ti_adpll_init_children_adpll_lj()
753 				   d->clocks[TI_ADPLL_M2].clk,  in ti_adpll_init_children_adpll_lj()
754 				   d->clocks[TI_ADPLL_BYPASS].clk);  in ti_adpll_init_children_adpll_lj()
761 static void ti_adpll_free_resources(struct ti_adpll_data *d)  in ti_adpll_free_resources()  argument
765 	for (i = TI_ADPLL_M3; i >= 0; i--) {  in ti_adpll_free_resources()
766 		struct ti_adpll_clock *ac = &d->clocks[i];  in ti_adpll_free_resources()
768 		if (!ac || IS_ERR_OR_NULL(ac->clk))  in ti_adpll_free_resources()
770 		if (ac->cl)  in ti_adpll_free_resources()
771 			clkdev_drop(ac->cl);  in ti_adpll_free_resources()
772 		if (ac->unregister)  in ti_adpll_free_resources()
773 			ac->unregister(ac->clk);  in ti_adpll_free_resources()
787 static int ti_adpll_init_registers(struct ti_adpll_data *d)  in ti_adpll_init_registers()  argument
791 	if (d->c->is_type_s) {  in ti_adpll_init_registers()
793 		ti_adpll_unlock_all(d->iobase + ADPLL_PLLSS_MMR_LOCK_OFFSET);  in ti_adpll_init_registers()
796 	d->regs = d->iobase + register_offset + ADPLL_PWRCTRL_OFFSET;  in ti_adpll_init_registers()
801 static int ti_adpll_init_inputs(struct ti_adpll_data *d)  in ti_adpll_init_inputs()  argument
807 	nr_inputs = of_clk_get_parent_count(d->np);  in ti_adpll_init_inputs()
808 	if (nr_inputs < d->c->nr_max_inputs) {  in ti_adpll_init_inputs()
809 		dev_err(d->dev, error, nr_inputs);  in ti_adpll_init_inputs()
810 		return -EINVAL;  in ti_adpll_init_inputs()
812 	of_clk_parent_fill(d->np, d->parent_names, nr_inputs);  in ti_adpll_init_inputs()
814 	clock = devm_clk_get(d->dev, d->parent_names[0]);  in ti_adpll_init_inputs()
816 		dev_err(d->dev, "could not get clkinp\n");  in ti_adpll_init_inputs()
819 	d->parent_clocks[TI_ADPLL_CLKINP] = clock;  in ti_adpll_init_inputs()
821 	clock = devm_clk_get(d->dev, d->parent_names[1]);  in ti_adpll_init_inputs()
823 		dev_err(d->dev, "could not get clkinpulow clock\n");  in ti_adpll_init_inputs()
826 	d->parent_clocks[TI_ADPLL_CLKINPULOW] = clock;  in ti_adpll_init_inputs()
828 	if (d->c->is_type_s) {  in ti_adpll_init_inputs()
829 		clock =  devm_clk_get(d->dev, d->parent_names[2]);  in ti_adpll_init_inputs()
831 			dev_err(d->dev, "could not get clkinphif clock\n");  in ti_adpll_init_inputs()
834 		d->parent_clocks[TI_ADPLL_CLKINPHIF] = clock;  in ti_adpll_init_inputs()
849 	.nr_max_inputs = MAX_ADPLL_INPUTS - 1,
850 	.nr_max_outputs = MAX_ADPLL_OUTPUTS - 1,
851 	.output_index = -EINVAL,
855 	{ .compatible = "ti,dm814-adpll-s-clock", &ti_adpll_type_s },
856 	{ .compatible = "ti,dm814-adpll-lj-clock", &ti_adpll_type_lj },
863 	struct device_node *node = pdev->dev.of_node;  in ti_adpll_probe()
864 	struct device *dev = &pdev->dev;  in ti_adpll_probe()
865 	struct ti_adpll_data *d;  in ti_adpll_probe()  local
869 	d = devm_kzalloc(dev, sizeof(*d), GFP_KERNEL);  in ti_adpll_probe()
870 	if (!d)  in ti_adpll_probe()
871 		return -ENOMEM;  in ti_adpll_probe()
872 	d->dev = dev;  in ti_adpll_probe()
873 	d->np = node;  in ti_adpll_probe()
874 	d->c = device_get_match_data(dev);  in ti_adpll_probe()
875 	dev_set_drvdata(d->dev, d);  in ti_adpll_probe()
876 	spin_lock_init(&d->lock);  in ti_adpll_probe()
878 	d->iobase = devm_platform_get_and_ioremap_resource(pdev, 0, &res);  in ti_adpll_probe()
879 	if (IS_ERR(d->iobase))  in ti_adpll_probe()
880 		return PTR_ERR(d->iobase);  in ti_adpll_probe()
881 	d->pa = res->start;  in ti_adpll_probe()
883 	err = ti_adpll_init_registers(d);  in ti_adpll_probe()
887 	err = ti_adpll_init_inputs(d);  in ti_adpll_probe()
891 	d->clocks = devm_kcalloc(d->dev,  in ti_adpll_probe()
895 	if (!d->clocks)  in ti_adpll_probe()
896 		return -ENOMEM;  in ti_adpll_probe()
898 	err = ti_adpll_init_dco(d);  in ti_adpll_probe()
904 	err = ti_adpll_init_children_adpll_s(d);  in ti_adpll_probe()
907 	err = ti_adpll_init_children_adpll_lj(d);  in ti_adpll_probe()
911 	err = of_clk_add_provider(d->np, of_clk_src_onecell_get, &d->outputs);  in ti_adpll_probe()
919 	ti_adpll_free_resources(d);  in ti_adpll_probe()
926 	struct ti_adpll_data *d = dev_get_drvdata(&pdev->dev);  in ti_adpll_remove()  local
928 	ti_adpll_free_resources(d);  in ti_adpll_remove()
933 		.name = "ti-adpll",
953 MODULE_ALIAS("platform:dm814-adpll-clock");