Lines Matching refs:tegra30_cpu_clk_sctx
147 } tegra30_cpu_clk_sctx; variable
1123 tegra30_cpu_clk_sctx.clk_csite_src = in tegra30_cpu_clock_suspend()
1127 tegra30_cpu_clk_sctx.cpu_burst = in tegra30_cpu_clock_suspend()
1129 tegra30_cpu_clk_sctx.pllx_base = in tegra30_cpu_clock_suspend()
1131 tegra30_cpu_clk_sctx.pllx_misc = in tegra30_cpu_clock_suspend()
1133 tegra30_cpu_clk_sctx.cclk_divider = in tegra30_cpu_clock_suspend()
1157 if (misc != tegra30_cpu_clk_sctx.pllx_misc || in tegra30_cpu_clock_resume()
1158 base != tegra30_cpu_clk_sctx.pllx_base) { in tegra30_cpu_clock_resume()
1160 writel(tegra30_cpu_clk_sctx.pllx_misc, in tegra30_cpu_clock_resume()
1162 writel(tegra30_cpu_clk_sctx.pllx_base, in tegra30_cpu_clock_resume()
1166 if (tegra30_cpu_clk_sctx.pllx_base & (1 << 30)) in tegra30_cpu_clock_resume()
1175 writel(tegra30_cpu_clk_sctx.cclk_divider, in tegra30_cpu_clock_resume()
1177 writel(tegra30_cpu_clk_sctx.cpu_burst, in tegra30_cpu_clock_resume()
1180 writel(tegra30_cpu_clk_sctx.clk_csite_src, in tegra30_cpu_clock_resume()