Lines Matching +full:26 +full:mhz
34 #define OSC_CTRL_PLL_REF_DIV_MASK (3<<26)
35 #define OSC_CTRL_PLL_REF_DIV_1 (0<<26)
36 #define OSC_CTRL_PLL_REF_DIV_2 (1<<26)
37 #define OSC_CTRL_PLL_REF_DIV_4 (2<<26)
190 { 16800000, 1040000000, 495, 8, 1, 8 }, /* actual: 1039.5 MHz */
195 { 16800000, 832000000, 396, 8, 1, 8 }, /* actual: 831.6 MHz */
202 { 26000000, 624000000, 624, 26, 1, 8 },
207 { 26000000, 600000000, 600, 26, 1, 8 },
210 { 16800000, 520000000, 495, 16, 1, 8 }, /* actual: 519.75 MHz */
212 { 26000000, 520000000, 520, 26, 1, 8 },
215 { 16800000, 416000000, 396, 16, 1, 8 }, /* actual: 415.8 MHz */
217 { 26000000, 416000000, 416, 26, 1, 8 },
226 { 26000000, 666000000, 666, 26, 1, 8 },
231 { 26000000, 600000000, 600, 26, 1, 8 },
240 { 26000000, 216000000, 432, 26, 2, 8 },
259 { 26000000, 216000000, 216, 26, 1, 4 },
264 { 26000000, 594000000, 594, 26, 1, 8 },
268 { 26000000, 1000000000, 1000, 26, 1, 12 },
283 { 26000000, 480000000, 960, 26, 2, 12 },
290 { 13000000, 1700000000, 915, 7, 1, 8 }, /* actual: 1699.2 MHz */
291 { 16800000, 1700000000, 708, 7, 1, 8 }, /* actual: 1699.2 MHz */
292 { 19200000, 1700000000, 885, 10, 1, 8 }, /* actual: 1699.2 MHz */
296 { 13000000, 1600000000, 738, 6, 1, 8 }, /* actual: 1599.0 MHz */
297 { 16800000, 1600000000, 857, 9, 1, 8 }, /* actual: 1599.7 MHz */
302 { 13000000, 1500000000, 923, 8, 1, 8 }, /* actual: 1499.8 MHz */
308 { 13000000, 1400000000, 969, 9, 1, 8 }, /* actual: 1399.7 MHz */
315 { 16800000, 1300000000, 928, 12, 1, 8 }, /* actual: 1299.2 MHz */
316 { 19200000, 1300000000, 812, 12, 1, 8 }, /* actual: 1299.2 MHz */
320 { 13000000, 1200000000, 923, 10, 1, 8 }, /* actual: 1199.9 MHz */
326 { 13000000, 1100000000, 846, 10, 1, 8 }, /* actual: 1099.8 MHz */
327 { 16800000, 1100000000, 982, 15, 1, 8 }, /* actual: 1099.8 MHz */
328 { 19200000, 1100000000, 859, 15, 1, 8 }, /* actual: 1099.5 MHz */
333 { 16800000, 1000000000, 833, 14, 1, 8 }, /* actual: 999.6 MHz */
335 { 26000000, 1000000000, 1000, 26, 1, 8 },