Lines Matching +full:clk +full:- +full:phase +full:-

1 // SPDX-License-Identifier: GPL-2.0-only
3 #include <linux/clk.h>
4 #include <linux/clk-provider.h>
15 #include "clk.h"
33 struct device *dev = clk_dev->dev; in tegra_clock_set_pd_state()
38 if (opp == ERR_PTR(-ERANGE)) { in tegra_clock_set_pd_state()
44 * not error out clk initialization. A typical example is in tegra_clock_set_pd_state()
71 mutex_lock(&clk_dev->lock); in tegra_clock_change_notify()
74 if (cnd->new_rate > cnd->old_rate) in tegra_clock_change_notify()
75 err = tegra_clock_set_pd_state(clk_dev, cnd->new_rate); in tegra_clock_change_notify()
79 err = tegra_clock_set_pd_state(clk_dev, cnd->old_rate); in tegra_clock_change_notify()
83 if (cnd->new_rate < cnd->old_rate) in tegra_clock_change_notify()
84 err = tegra_clock_set_pd_state(clk_dev, cnd->new_rate); in tegra_clock_change_notify()
90 mutex_unlock(&clk_dev->lock); in tegra_clock_change_notify()
100 mutex_lock(&clk_dev->lock); in tegra_clock_sync_pd_state()
102 rate = clk_hw_get_rate(clk_dev->hw); in tegra_clock_sync_pd_state()
105 mutex_unlock(&clk_dev->lock); in tegra_clock_sync_pd_state()
114 struct device *dev = &pdev->dev; in tegra_clock_probe()
115 struct clk *clk; in tegra_clock_probe() local
118 if (!dev->pm_domain) in tegra_clock_probe()
119 return -EINVAL; in tegra_clock_probe()
123 return -ENOMEM; in tegra_clock_probe()
125 clk = devm_clk_get(dev, NULL); in tegra_clock_probe()
126 if (IS_ERR(clk)) in tegra_clock_probe()
127 return PTR_ERR(clk); in tegra_clock_probe()
129 clk_dev->dev = dev; in tegra_clock_probe()
130 clk_dev->hw = __clk_get_hw(clk); in tegra_clock_probe()
131 clk_dev->clk_nb.notifier_call = tegra_clock_change_notify; in tegra_clock_probe()
132 mutex_init(&clk_dev->lock); in tegra_clock_probe()
137 * Runtime PM was already enabled for this device by the parent clk in tegra_clock_probe()
147 err = clk_notifier_register(clk, &clk_dev->clk_nb); in tegra_clock_probe()
149 dev_err(dev, "failed to register clk notifier: %d\n", err); in tegra_clock_probe()
165 clk_notifier_unregister(clk, &clk_dev->clk_nb); in tegra_clock_probe()
171 * Tegra GENPD driver enables clocks during NOIRQ phase. It can't be done
173 * NOIRQ phase. We will keep clocks resumed during suspend to mitigate this
182 { .compatible = "nvidia,tegra20-sclk" },
183 { .compatible = "nvidia,tegra30-sclk" },
184 { .compatible = "nvidia,tegra30-pllc" },
185 { .compatible = "nvidia,tegra30-plle" },
186 { .compatible = "nvidia,tegra30-pllm" },
192 .name = "tegra-clock",