Lines Matching +full:sun8i +full:- +full:v3s +full:- +full:isp
1 // SPDX-License-Identifier: GPL-2.0-only
5 * Based on ccu-sun8i-h3.c, which is:
9 #include <linux/clk-provider.h>
28 #include "ccu-sun8i-v3s.h"
30 static SUNXI_CCU_NKMP_WITH_GATE_LOCK(pll_cpu_clk, "pll-cpu",
45 * With sigma-delta modulation for fractional-N on the audio PLL,
59 static SUNXI_CCU_NM_WITH_SDM_GATE_LOCK(pll_audio_base_clk, "pll-audio-base",
69 static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_video_clk, "pll-video",
81 static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_ve_clk, "pll-ve",
93 static SUNXI_CCU_NKM_WITH_GATE_LOCK(pll_ddr0_clk, "pll-ddr0",
102 static SUNXI_CCU_NK_WITH_GATE_LOCK_POSTDIV(pll_periph0_clk, "pll-periph0",
108 2, /* post-div */
111 static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_isp_clk, "pll-isp",
123 static SUNXI_CCU_NK_WITH_GATE_LOCK_POSTDIV(pll_periph1_clk, "pll-periph1",
129 2, /* post-div */
132 static SUNXI_CCU_NM_WITH_GATE_LOCK(pll_ddr1_clk, "pll-ddr1",
141 "pll-cpu", "pll-cpu" };
148 "axi", "pll-periph0" };
184 "pll-periph0", "pll-periph0" };
191 static const char * const ahb2_parents[] = { "ahb1", "pll-periph0" };
213 static SUNXI_CCU_GATE(bus_ce_clk, "bus-ce", "ahb1",
215 static SUNXI_CCU_GATE(bus_dma_clk, "bus-dma", "ahb1",
217 static SUNXI_CCU_GATE(bus_mmc0_clk, "bus-mmc0", "ahb1",
219 static SUNXI_CCU_GATE(bus_mmc1_clk, "bus-mmc1", "ahb1",
221 static SUNXI_CCU_GATE(bus_mmc2_clk, "bus-mmc2", "ahb1",
223 static SUNXI_CCU_GATE(bus_dram_clk, "bus-dram", "ahb1",
225 static SUNXI_CCU_GATE(bus_emac_clk, "bus-emac", "ahb2",
227 static SUNXI_CCU_GATE(bus_hstimer_clk, "bus-hstimer", "ahb1",
229 static SUNXI_CCU_GATE(bus_spi0_clk, "bus-spi0", "ahb1",
231 static SUNXI_CCU_GATE(bus_otg_clk, "bus-otg", "ahb1",
233 static SUNXI_CCU_GATE(bus_ehci0_clk, "bus-ehci0", "ahb1",
235 static SUNXI_CCU_GATE(bus_ohci0_clk, "bus-ohci0", "ahb1",
238 static SUNXI_CCU_GATE(bus_ve_clk, "bus-ve", "ahb1",
240 static SUNXI_CCU_GATE(bus_tcon0_clk, "bus-tcon0", "ahb1",
242 static SUNXI_CCU_GATE(bus_csi_clk, "bus-csi", "ahb1",
244 static SUNXI_CCU_GATE(bus_de_clk, "bus-de", "ahb1",
247 static SUNXI_CCU_GATE(bus_codec_clk, "bus-codec", "apb1",
249 static SUNXI_CCU_GATE(bus_pio_clk, "bus-pio", "apb1",
251 static SUNXI_CCU_GATE(bus_i2s0_clk, "bus-i2s0", "apb1",
254 static SUNXI_CCU_GATE(bus_i2c0_clk, "bus-i2c0", "apb2",
256 static SUNXI_CCU_GATE(bus_i2c1_clk, "bus-i2c1", "apb2",
258 static SUNXI_CCU_GATE(bus_uart0_clk, "bus-uart0", "apb2",
260 static SUNXI_CCU_GATE(bus_uart1_clk, "bus-uart1", "apb2",
262 static SUNXI_CCU_GATE(bus_uart2_clk, "bus-uart2", "apb2",
265 static SUNXI_CCU_GATE(bus_ephy_clk, "bus-ephy", "ahb1",
267 static SUNXI_CCU_GATE(bus_dbg_clk, "bus-dbg", "ahb1",
270 static const char * const mod0_default_parents[] = { "osc24M", "pll-periph0",
271 "pll-periph1" };
308 static const char * const ce_parents[] = { "osc24M", "pll-periph0", };
324 static const char * const i2s_parents[] = { "pll-audio-8x", "pll-audio-4x",
325 "pll-audio-2x", "pll-audio" };
329 static SUNXI_CCU_GATE(usb_phy0_clk, "usb-phy0", "osc24M",
331 static SUNXI_CCU_GATE(usb_ohci0_clk, "usb-ohci0", "osc24M",
334 static const char * const dram_parents[] = { "pll-ddr0", "pll-ddr1",
335 "pll-periph0-2x" };
339 static SUNXI_CCU_GATE(dram_ve_clk, "dram-ve", "dram",
341 static SUNXI_CCU_GATE(dram_csi_clk, "dram-csi", "dram",
343 static SUNXI_CCU_GATE(dram_ehci_clk, "dram-ehci", "dram",
345 static SUNXI_CCU_GATE(dram_ohci_clk, "dram-ohci", "dram",
348 static const char * const de_parents[] = { "pll-video", "pll-periph0" };
353 static const char * const tcon_parents[] = { "pll-video" };
357 static SUNXI_CCU_GATE(csi_misc_clk, "csi-misc", "osc24M",
360 static const char * const csi_mclk_parents[] = { "osc24M", "pll-video",
361 "pll-periph0", "pll-periph1" };
362 static SUNXI_CCU_M_WITH_MUX_GATE(csi0_mclk_clk, "csi0-mclk", csi_mclk_parents,
365 static const char * const csi1_sclk_parents[] = { "pll-video", "pll-isp" };
366 static SUNXI_CCU_M_WITH_MUX_GATE(csi1_sclk_clk, "csi-sclk", csi1_sclk_parents,
369 static SUNXI_CCU_M_WITH_MUX_GATE(csi1_mclk_clk, "csi-mclk", csi_mclk_parents,
372 static SUNXI_CCU_M_WITH_GATE(ve_clk, "ve", "pll-ve",
375 static SUNXI_CCU_GATE(ac_dig_clk, "ac-dig", "pll-audio",
380 static const char * const mbus_parents[] = { "osc24M", "pll-periph0-2x",
381 "pll-ddr" };
385 static const char * const mipi_csi_parents[] = { "pll-video", "pll-periph0",
386 "pll-isp" };
387 static SUNXI_CCU_M_WITH_MUX_GATE(mipi_csi_clk, "mipi-csi", mipi_csi_parents,
469 static CLK_FIXED_FACTOR_HWS(pll_audio_clk, "pll-audio",
472 static CLK_FIXED_FACTOR_HWS(pll_audio_2x_clk, "pll-audio-2x",
475 static CLK_FIXED_FACTOR_HWS(pll_audio_4x_clk, "pll-audio-4x",
478 static CLK_FIXED_FACTOR_HWS(pll_audio_8x_clk, "pll-audio-8x",
481 static CLK_FIXED_FACTOR_HW(pll_periph0_2x_clk, "pll-periph0-2x",
744 desc = of_device_get_match_data(&pdev->dev); in sun8i_v3s_ccu_probe()
746 return -EINVAL; in sun8i_v3s_ccu_probe()
752 /* Force the PLL-Audio-1x divider to 1 */ in sun8i_v3s_ccu_probe()
757 return devm_sunxi_ccu_probe(&pdev->dev, reg, desc); in sun8i_v3s_ccu_probe()
762 .compatible = "allwinner,sun8i-v3-ccu",
766 .compatible = "allwinner,sun8i-v3s-ccu",
776 .name = "sun8i-v3s-ccu",
784 MODULE_DESCRIPTION("Support for the Allwinner V3s CCU");