Lines Matching +full:0 +full:x060

32 	.m	= _SUNXI_CCU_DIV(0, 2),
36 .reg = 0x000,
39 0),
55 #define SUN8I_A33_PLL_AUDIO_REG 0x008
58 { .rate = 22579200, .pattern = 0xc0010d84, .m = 8, .n = 7 },
59 { .rate = 24576000, .pattern = 0xc000ac02, .m = 14, .n = 14 },
63 "osc24M", 0x008,
65 0, 5, /* M */
67 0x284, BIT(31),
73 "osc24M", 0x010,
75 0, 4, /* M */
78 270000000, /* frac rate 0 */
85 "osc24M", 0x018,
87 0, 4, /* M */
90 270000000, /* frac rate 0 */
97 "osc24M", 0x020,
100 0, 2, /* M */
103 0);
106 "osc24M", 0x028,
115 "osc24M", 0x038,
117 0, 4, /* M */
120 270000000, /* frac rate 0 */
133 #define SUN8I_A33_PLL_MIPI_REG 0x040
135 "pll-video", 0x040,
138 0, 4, /* M */
144 "osc24M", 0x044,
146 0, 4, /* M */
149 270000000, /* frac rate 0 */
156 "osc24M", 0x048,
158 0, 4, /* M */
161 270000000, /* frac rate 0 */
170 .mult = _SUNXI_CCU_MULT_OFFSET_MIN_MAX(8, 6, 0, 12, 0),
172 .reg = 0x04c,
182 0x050, 16, 2, CLK_IS_CRITICAL | CLK_SET_RATE_PARENT);
184 static SUNXI_CCU_M(axi_clk, "axi", "cpux", 0x050, 0, 2, 0);
203 .reg = 0x054,
208 0),
213 { .val = 0, .div = 2 },
220 0x054, 8, 2, apb1_div_table, 0);
224 static SUNXI_CCU_MP_WITH_MUX(apb2_clk, "apb2", apb2_parents, 0x058,
225 0, 5, /* M */
228 0);
231 0x060, BIT(1), 0);
233 0x060, BIT(5), 0);
235 0x060, BIT(6), 0);
237 0x060, BIT(8), 0);
239 0x060, BIT(9), 0);
241 0x060, BIT(10), 0);
243 0x060, BIT(13), 0);
245 0x060, BIT(14), 0);
247 0x060, BIT(19), 0);
249 0x060, BIT(20), 0);
251 0x060, BIT(21), 0);
253 0x060, BIT(24), 0);
255 0x060, BIT(26), 0);
257 0x060, BIT(29), 0);
260 0x064, BIT(0), 0);
262 0x064, BIT(4), 0);
264 0x064, BIT(8), 0);
266 0x064, BIT(12), 0);
268 0x064, BIT(14), 0);
270 0x064, BIT(20), 0);
272 0x064, BIT(21), 0);
274 0x064, BIT(22), 0);
276 0x064, BIT(25), 0);
278 0x064, BIT(26), 0);
281 0x068, BIT(0), 0);
283 0x068, BIT(5), 0);
285 0x068, BIT(12), 0);
287 0x068, BIT(13), 0);
290 0x06c, BIT(0), 0);
292 0x06c, BIT(1), 0);
294 0x06c, BIT(2), 0);
296 0x06c, BIT(16), 0);
298 0x06c, BIT(17), 0);
300 0x06c, BIT(18), 0);
302 0x06c, BIT(19), 0);
304 0x06c, BIT(20), 0);
307 static SUNXI_CCU_MP_WITH_MUX_GATE(nand_clk, "nand", mod0_default_parents, 0x080,
308 0, 4, /* M */
312 0);
314 static SUNXI_CCU_MP_WITH_MUX_GATE(mmc0_clk, "mmc0", mod0_default_parents, 0x088,
315 0, 4, /* M */
319 0);
322 0x088, 20, 3, 0);
324 0x088, 8, 3, 0);
326 static SUNXI_CCU_MP_WITH_MUX_GATE(mmc1_clk, "mmc1", mod0_default_parents, 0x08c,
327 0, 4, /* M */
331 0);
334 0x08c, 20, 3, 0);
336 0x08c, 8, 3, 0);
338 static SUNXI_CCU_MP_WITH_MUX_GATE(mmc2_clk, "mmc2", mod0_default_parents, 0x090,
339 0, 4, /* M */
343 0);
346 0x090, 20, 3, 0);
348 0x090, 8, 3, 0);
350 static SUNXI_CCU_MP_WITH_MUX_GATE(ss_clk, "ss", mod0_default_parents, 0x09c,
351 0, 4, /* M */
355 0);
357 static SUNXI_CCU_MP_WITH_MUX_GATE(spi0_clk, "spi0", mod0_default_parents, 0x0a0,
358 0, 4, /* M */
362 0);
364 static SUNXI_CCU_MP_WITH_MUX_GATE(spi1_clk, "spi1", mod0_default_parents, 0x0a4,
365 0, 4, /* M */
369 0);
374 0x0b0, 16, 2, BIT(31), CLK_SET_RATE_PARENT);
377 0x0b4, 16, 2, BIT(31), CLK_SET_RATE_PARENT);
381 0x0cc, BIT(8), 0);
383 0x0cc, BIT(9), 0);
385 0x0cc, BIT(10), 0);
387 0x0cc, BIT(11), 0);
389 0x0cc, BIT(16), 0);
392 0x0f4, 0, 4, CLK_IS_CRITICAL);
396 0x0f8, 16, 1, 0);
399 0x100, BIT(0), 0);
401 0x100, BIT(1), 0);
403 0x100, BIT(16), 0);
405 0x100, BIT(24), 0);
407 0x100, BIT(26), 0);
411 static const u8 de_table[] = { 0, 2, 3, 5 };
414 0x104, 0, 4, 24, 3, BIT(31), 0);
418 0x10c, 0, 4, 24, 3, BIT(31), 0);
422 static const u8 lcd_ch0_table[] = { 0, 2, 4 };
425 0x118, 24, 3, BIT(31),
429 static const u8 lcd_ch1_table[] = { 0, 2 };
432 0x12c, 0, 4, 24, 2, BIT(31), 0);
436 static const u8 csi_sclk_table[] = { 0, 3, 4, 5 };
439 0x134, 16, 4, 24, 3, BIT(31), 0);
443 static const u8 csi_mclk_table[] = { 0, 3, 5 };
446 0x134, 0, 5, 8, 3, BIT(15), 0);
449 0x13c, 16, 3, BIT(31), CLK_SET_RATE_PARENT);
452 0x140, BIT(31), CLK_SET_RATE_PARENT);
454 0x140, BIT(30), CLK_SET_RATE_PARENT);
456 0x144, BIT(31), 0);
461 0x15c, 0, 3, 24, 2, BIT(31), CLK_IS_CRITICAL);
464 static const u8 dsi_sclk_table[] = { 0, 2 };
467 0x168, 16, 4, 24, 2, BIT(31), 0);
470 static const u8 dsi_dphy_table[] = { 0, 2 };
473 0x168, 0, 4, 8, 2, BIT(15), 0);
477 0x180, 0, 4, 24, 3, BIT(31), 0);
480 0x1a0, 0, 3, BIT(31), CLK_SET_RATE_PARENT);
484 0x1b0, 0, 3, 24, 2, BIT(31), 0);
603 1, 2, 0);
606 1, 2, 0);
716 [RST_USB_PHY0] = { 0x0cc, BIT(0) },
717 [RST_USB_PHY1] = { 0x0cc, BIT(1) },
718 [RST_USB_HSIC] = { 0x0cc, BIT(2) },
720 [RST_MBUS] = { 0x0fc, BIT(31) },
722 [RST_BUS_MIPI_DSI] = { 0x2c0, BIT(1) },
723 [RST_BUS_SS] = { 0x2c0, BIT(5) },
724 [RST_BUS_DMA] = { 0x2c0, BIT(6) },
725 [RST_BUS_MMC0] = { 0x2c0, BIT(8) },
726 [RST_BUS_MMC1] = { 0x2c0, BIT(9) },
727 [RST_BUS_MMC2] = { 0x2c0, BIT(10) },
728 [RST_BUS_NAND] = { 0x2c0, BIT(13) },
729 [RST_BUS_DRAM] = { 0x2c0, BIT(14) },
730 [RST_BUS_HSTIMER] = { 0x2c0, BIT(19) },
731 [RST_BUS_SPI0] = { 0x2c0, BIT(20) },
732 [RST_BUS_SPI1] = { 0x2c0, BIT(21) },
733 [RST_BUS_OTG] = { 0x2c0, BIT(24) },
734 [RST_BUS_EHCI] = { 0x2c0, BIT(26) },
735 [RST_BUS_OHCI] = { 0x2c0, BIT(29) },
737 [RST_BUS_VE] = { 0x2c4, BIT(0) },
738 [RST_BUS_LCD] = { 0x2c4, BIT(4) },
739 [RST_BUS_CSI] = { 0x2c4, BIT(8) },
740 [RST_BUS_DE_BE] = { 0x2c4, BIT(12) },
741 [RST_BUS_DE_FE] = { 0x2c4, BIT(14) },
742 [RST_BUS_GPU] = { 0x2c4, BIT(20) },
743 [RST_BUS_MSGBOX] = { 0x2c4, BIT(21) },
744 [RST_BUS_SPINLOCK] = { 0x2c4, BIT(22) },
745 [RST_BUS_DRC] = { 0x2c4, BIT(25) },
746 [RST_BUS_SAT] = { 0x2c4, BIT(26) },
748 [RST_BUS_LVDS] = { 0x2c8, BIT(0) },
750 [RST_BUS_CODEC] = { 0x2d0, BIT(0) },
751 [RST_BUS_I2S0] = { 0x2d0, BIT(12) },
752 [RST_BUS_I2S1] = { 0x2d0, BIT(13) },
754 [RST_BUS_I2C0] = { 0x2d8, BIT(0) },
755 [RST_BUS_I2C1] = { 0x2d8, BIT(1) },
756 [RST_BUS_I2C2] = { 0x2d8, BIT(2) },
757 [RST_BUS_UART0] = { 0x2d8, BIT(16) },
758 [RST_BUS_UART1] = { 0x2d8, BIT(17) },
759 [RST_BUS_UART2] = { 0x2d8, BIT(18) },
760 [RST_BUS_UART3] = { 0x2d8, BIT(19) },
761 [RST_BUS_UART4] = { 0x2d8, BIT(20) },
794 reg = devm_platform_ioremap_resource(pdev, 0); in sun8i_a33_ccu_probe()
801 writel(val | (0 << 16), reg + SUN8I_A33_PLL_AUDIO_REG); in sun8i_a33_ccu_probe()
819 return 0; in sun8i_a33_ccu_probe()