Lines Matching +full:sun5i +full:- +full:a13 +full:- +full:mbus

1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <linux/clk-provider.h>
24 #include "ccu-sun5i.h"
34 .hw.init = CLK_HW_INIT("pll-core",
46 * With sigma-delta modulation for fractional-N on the audio PLL,
74 .hw.init = CLK_HW_INIT("pll-audio-base",
91 .hw.init = CLK_HW_INIT("pll-video0",
106 .hw.init = CLK_HW_INIT("pll-ve",
119 .hw.init = CLK_HW_INIT("pll-ddr-base",
126 static SUNXI_CCU_M(pll_ddr_clk, "pll-ddr", "pll-ddr-base", 0x020, 0, 2,
134 .hw.init = CLK_HW_INIT("pll-ddr-other", "pll-ddr-base",
148 .hw.init = CLK_HW_INIT("pll-periph",
165 .hw.init = CLK_HW_INIT("pll-video1",
176 "pll-core" , "pll-periph" };
199 static const char * const ahb_parents[] = { "axi" , "cpu", "pll-periph" };
231 static const char * const apb1_parents[] = { "hosc", "pll-periph", "osc32k" };
238 static SUNXI_CCU_GATE(axi_dram_clk, "axi-dram", "axi",
241 static SUNXI_CCU_GATE(ahb_otg_clk, "ahb-otg", "ahb",
243 static SUNXI_CCU_GATE(ahb_ehci_clk, "ahb-ehci", "ahb",
245 static SUNXI_CCU_GATE(ahb_ohci_clk, "ahb-ohci", "ahb",
247 static SUNXI_CCU_GATE(ahb_ss_clk, "ahb-ss", "ahb",
249 static SUNXI_CCU_GATE(ahb_dma_clk, "ahb-dma", "ahb",
251 static SUNXI_CCU_GATE(ahb_bist_clk, "ahb-bist", "ahb",
253 static SUNXI_CCU_GATE(ahb_mmc0_clk, "ahb-mmc0", "ahb",
255 static SUNXI_CCU_GATE(ahb_mmc1_clk, "ahb-mmc1", "ahb",
257 static SUNXI_CCU_GATE(ahb_mmc2_clk, "ahb-mmc2", "ahb",
259 static SUNXI_CCU_GATE(ahb_nand_clk, "ahb-nand", "ahb",
261 static SUNXI_CCU_GATE(ahb_sdram_clk, "ahb-sdram", "ahb",
263 static SUNXI_CCU_GATE(ahb_emac_clk, "ahb-emac", "ahb",
265 static SUNXI_CCU_GATE(ahb_ts_clk, "ahb-ts", "ahb",
267 static SUNXI_CCU_GATE(ahb_spi0_clk, "ahb-spi0", "ahb",
269 static SUNXI_CCU_GATE(ahb_spi1_clk, "ahb-spi1", "ahb",
271 static SUNXI_CCU_GATE(ahb_spi2_clk, "ahb-spi2", "ahb",
273 static SUNXI_CCU_GATE(ahb_gps_clk, "ahb-gps", "ahb",
275 static SUNXI_CCU_GATE(ahb_hstimer_clk, "ahb-hstimer", "ahb",
278 static SUNXI_CCU_GATE(ahb_ve_clk, "ahb-ve", "ahb",
280 static SUNXI_CCU_GATE(ahb_tve_clk, "ahb-tve", "ahb",
282 static SUNXI_CCU_GATE(ahb_lcd_clk, "ahb-lcd", "ahb",
284 static SUNXI_CCU_GATE(ahb_csi_clk, "ahb-csi", "ahb",
286 static SUNXI_CCU_GATE(ahb_hdmi_clk, "ahb-hdmi", "ahb",
288 static SUNXI_CCU_GATE(ahb_de_be_clk, "ahb-de-be", "ahb",
290 static SUNXI_CCU_GATE(ahb_de_fe_clk, "ahb-de-fe", "ahb",
292 static SUNXI_CCU_GATE(ahb_iep_clk, "ahb-iep", "ahb",
294 static SUNXI_CCU_GATE(ahb_gpu_clk, "ahb-gpu", "ahb",
297 static SUNXI_CCU_GATE(apb0_codec_clk, "apb0-codec", "apb0",
299 static SUNXI_CCU_GATE(apb0_spdif_clk, "apb0-spdif", "apb0",
301 static SUNXI_CCU_GATE(apb0_i2s_clk, "apb0-i2s", "apb0",
303 static SUNXI_CCU_GATE(apb0_pio_clk, "apb0-pio", "apb0",
305 static SUNXI_CCU_GATE(apb0_ir_clk, "apb0-ir", "apb0",
307 static SUNXI_CCU_GATE(apb0_keypad_clk, "apb0-keypad", "apb0",
310 static SUNXI_CCU_GATE(apb1_i2c0_clk, "apb1-i2c0", "apb1",
312 static SUNXI_CCU_GATE(apb1_i2c1_clk, "apb1-i2c1", "apb1",
314 static SUNXI_CCU_GATE(apb1_i2c2_clk, "apb1-i2c2", "apb1",
316 static SUNXI_CCU_GATE(apb1_uart0_clk, "apb1-uart0", "apb1",
318 static SUNXI_CCU_GATE(apb1_uart1_clk, "apb1-uart1", "apb1",
320 static SUNXI_CCU_GATE(apb1_uart2_clk, "apb1-uart2", "apb1",
322 static SUNXI_CCU_GATE(apb1_uart3_clk, "apb1-uart3", "apb1",
325 static const char * const mod0_default_parents[] = { "hosc", "pll-periph",
326 "pll-ddr-other" };
397 static const char * const i2s_parents[] = { "pll-audio-8x", "pll-audio-4x",
398 "pll-audio-2x", "pll-audio" };
402 static const char * const spdif_parents[] = { "pll-audio-8x", "pll-audio-4x",
403 "pll-audio-2x", "pll-audio" };
424 static SUNXI_CCU_GATE(usb_ohci_clk, "usb-ohci", "pll-periph",
426 static SUNXI_CCU_GATE(usb_phy0_clk, "usb-phy0", "pll-periph",
428 static SUNXI_CCU_GATE(usb_phy1_clk, "usb-phy1", "pll-periph",
431 static const char * const gps_parents[] = { "hosc", "pll-periph",
432 "pll-video1", "pll-ve" };
436 static SUNXI_CCU_GATE(dram_ve_clk, "dram-ve", "pll-ddr",
438 static SUNXI_CCU_GATE(dram_csi_clk, "dram-csi", "pll-ddr",
440 static SUNXI_CCU_GATE(dram_ts_clk, "dram-ts", "pll-ddr",
442 static SUNXI_CCU_GATE(dram_tve_clk, "dram-tve", "pll-ddr",
444 static SUNXI_CCU_GATE(dram_de_fe_clk, "dram-de-fe", "pll-ddr",
446 static SUNXI_CCU_GATE(dram_de_be_clk, "dram-de-be", "pll-ddr",
448 static SUNXI_CCU_GATE(dram_ace_clk, "dram-ace", "pll-ddr",
450 static SUNXI_CCU_GATE(dram_iep_clk, "dram-iep", "pll-ddr",
453 static const char * const de_parents[] = { "pll-video0", "pll-video1",
454 "pll-ddr-other" };
455 static SUNXI_CCU_M_WITH_MUX_GATE(de_be_clk, "de-be", de_parents,
458 static SUNXI_CCU_M_WITH_MUX_GATE(de_fe_clk, "de-fe", de_parents,
461 static const char * const tcon_parents[] = { "pll-video0", "pll-video1",
462 "pll-video0-2x", "pll-video1-2x" };
463 static SUNXI_CCU_MUX_WITH_GATE(tcon_ch0_clk, "tcon-ch0-sclk", tcon_parents,
466 static SUNXI_CCU_M_WITH_MUX_GATE(tcon_ch1_sclk2_clk, "tcon-ch1-sclk2",
470 static SUNXI_CCU_M_WITH_GATE(tcon_ch1_sclk1_clk, "tcon-ch1-sclk1", "tcon-ch1-sclk2",
473 static const char * const csi_parents[] = { "hosc", "pll-video0", "pll-video1",
474 "pll-video0-2x", "pll-video1-2x" };
480 static SUNXI_CCU_GATE(ve_clk, "ve", "pll-ve",
483 static SUNXI_CCU_GATE(codec_clk, "codec", "pll-audio",
489 static const char * const hdmi_parents[] = { "pll-video0", "pll-video0-2x" };
496 static const char * const gpu_parents[] = { "pll-video0", "pll-ve",
497 "pll-ddr-other", "pll-video1",
498 "pll-video1-2x" };
502 static const char * const mbus_parents[] = { "hosc", "pll-periph", "pll-ddr" };
503 static SUNXI_CCU_MP_WITH_MUX_GATE(mbus_clk, "mbus", mbus_parents,
506 static SUNXI_CCU_GATE(iep_clk, "iep", "de-be",
611 static CLK_FIXED_FACTOR_HWS(pll_audio_clk, "pll-audio",
614 static CLK_FIXED_FACTOR_HWS(pll_audio_2x_clk, "pll-audio-2x",
617 static CLK_FIXED_FACTOR_HWS(pll_audio_4x_clk, "pll-audio-4x",
620 static CLK_FIXED_FACTOR_HWS(pll_audio_8x_clk, "pll-audio-8x",
623 static CLK_FIXED_FACTOR_HW(pll_video0_2x_clk, "pll-video0-2x",
626 static CLK_FIXED_FACTOR_HW(pll_video1_2x_clk, "pll-video1-2x",
767 * The A13 is the A10s minus the TS, GPS, HDMI, I2S and the keypad
999 /* Force the PLL-Audio-1x divider to 1 */ in sun5i_ccu_init()
1022 CLK_OF_DECLARE(sun5i_a10s_ccu, "allwinner,sun5i-a10s-ccu",
1029 CLK_OF_DECLARE(sun5i_a13_ccu, "allwinner,sun5i-a13-ccu",
1036 CLK_OF_DECLARE(sun5i_gr8_ccu, "nextthing,gr8-ccu",