Lines Matching +full:pll +full:- +full:periph
1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/clk-provider.h>
28 #include "ccu-sun4i-a10.h"
38 .hw.init = CLK_HW_INIT("pll-core",
46 * The Audio PLL is supposed to have 4 outputs: 3 fixed factors from
48 * pll audio).
50 * With sigma-delta modulation for fractional-N on the audio PLL,
73 .hw.init = CLK_HW_INIT("pll-audio-base",
91 .hw.init = CLK_HW_INIT("pll-video0",
106 .hw.init = CLK_HW_INIT("pll-ve",
119 .hw.init = CLK_HW_INIT("pll-ve",
132 .hw.init = CLK_HW_INIT("pll-ddr-base",
139 static SUNXI_CCU_M(pll_ddr_clk, "pll-ddr", "pll-ddr-base", 0x020, 0, 2,
146 .hw.init = CLK_HW_INIT("pll-ddr-other", "pll-ddr-base",
158 .hw.init = CLK_HW_INIT("pll-periph-base",
165 static CLK_FIXED_FACTOR_HW(pll_periph_clk, "pll-periph",
177 .hw.init = CLK_HW_INIT("pll-periph-sata",
178 "pll-periph-base",
193 .hw.init = CLK_HW_INIT("pll-video1",
207 .hw.init = CLK_HW_INIT("pll-gpu",
217 "pll-core", "pll-periph" };
250 static const char *const ahb_sun7i_parents[] = { "axi", "pll-periph",
251 "pll-periph" };
284 static const char *const apb1_parents[] = { "hosc", "pll-periph", "osc32k" };
292 static SUNXI_CCU_GATE(axi_dram_clk, "axi-dram", "ahb",
295 static SUNXI_CCU_GATE(ahb_otg_clk, "ahb-otg", "ahb",
297 static SUNXI_CCU_GATE(ahb_ehci0_clk, "ahb-ehci0", "ahb",
299 static SUNXI_CCU_GATE(ahb_ohci0_clk, "ahb-ohci0", "ahb",
301 static SUNXI_CCU_GATE(ahb_ehci1_clk, "ahb-ehci1", "ahb",
303 static SUNXI_CCU_GATE(ahb_ohci1_clk, "ahb-ohci1", "ahb",
305 static SUNXI_CCU_GATE(ahb_ss_clk, "ahb-ss", "ahb",
307 static SUNXI_CCU_GATE(ahb_dma_clk, "ahb-dma", "ahb",
309 static SUNXI_CCU_GATE(ahb_bist_clk, "ahb-bist", "ahb",
311 static SUNXI_CCU_GATE(ahb_mmc0_clk, "ahb-mmc0", "ahb",
313 static SUNXI_CCU_GATE(ahb_mmc1_clk, "ahb-mmc1", "ahb",
315 static SUNXI_CCU_GATE(ahb_mmc2_clk, "ahb-mmc2", "ahb",
317 static SUNXI_CCU_GATE(ahb_mmc3_clk, "ahb-mmc3", "ahb",
319 static SUNXI_CCU_GATE(ahb_ms_clk, "ahb-ms", "ahb",
321 static SUNXI_CCU_GATE(ahb_nand_clk, "ahb-nand", "ahb",
323 static SUNXI_CCU_GATE(ahb_sdram_clk, "ahb-sdram", "ahb",
326 static SUNXI_CCU_GATE(ahb_ace_clk, "ahb-ace", "ahb",
328 static SUNXI_CCU_GATE(ahb_emac_clk, "ahb-emac", "ahb",
330 static SUNXI_CCU_GATE(ahb_ts_clk, "ahb-ts", "ahb",
332 static SUNXI_CCU_GATE(ahb_spi0_clk, "ahb-spi0", "ahb",
334 static SUNXI_CCU_GATE(ahb_spi1_clk, "ahb-spi1", "ahb",
336 static SUNXI_CCU_GATE(ahb_spi2_clk, "ahb-spi2", "ahb",
338 static SUNXI_CCU_GATE(ahb_spi3_clk, "ahb-spi3", "ahb",
340 static SUNXI_CCU_GATE(ahb_pata_clk, "ahb-pata", "ahb",
343 static SUNXI_CCU_GATE(ahb_sata_clk, "ahb-sata", "ahb",
346 static SUNXI_CCU_GATE(ahb_gps_clk, "ahb-gps", "ahb",
349 static SUNXI_CCU_GATE(ahb_hstimer_clk, "ahb-hstimer", "ahb",
352 static SUNXI_CCU_GATE(ahb_ve_clk, "ahb-ve", "ahb",
354 static SUNXI_CCU_GATE(ahb_tvd_clk, "ahb-tvd", "ahb",
356 static SUNXI_CCU_GATE(ahb_tve0_clk, "ahb-tve0", "ahb",
358 static SUNXI_CCU_GATE(ahb_tve1_clk, "ahb-tve1", "ahb",
360 static SUNXI_CCU_GATE(ahb_lcd0_clk, "ahb-lcd0", "ahb",
362 static SUNXI_CCU_GATE(ahb_lcd1_clk, "ahb-lcd1", "ahb",
364 static SUNXI_CCU_GATE(ahb_csi0_clk, "ahb-csi0", "ahb",
366 static SUNXI_CCU_GATE(ahb_csi1_clk, "ahb-csi1", "ahb",
369 static SUNXI_CCU_GATE(ahb_hdmi1_clk, "ahb-hdmi1", "ahb",
371 static SUNXI_CCU_GATE(ahb_hdmi0_clk, "ahb-hdmi0", "ahb",
373 static SUNXI_CCU_GATE(ahb_de_be0_clk, "ahb-de-be0", "ahb",
375 static SUNXI_CCU_GATE(ahb_de_be1_clk, "ahb-de-be1", "ahb",
377 static SUNXI_CCU_GATE(ahb_de_fe0_clk, "ahb-de-fe0", "ahb",
379 static SUNXI_CCU_GATE(ahb_de_fe1_clk, "ahb-de-fe1", "ahb",
382 static SUNXI_CCU_GATE(ahb_gmac_clk, "ahb-gmac", "ahb",
384 static SUNXI_CCU_GATE(ahb_mp_clk, "ahb-mp", "ahb",
386 static SUNXI_CCU_GATE(ahb_gpu_clk, "ahb-gpu", "ahb",
389 static SUNXI_CCU_GATE(apb0_codec_clk, "apb0-codec", "apb0",
391 static SUNXI_CCU_GATE(apb0_spdif_clk, "apb0-spdif", "apb0",
393 static SUNXI_CCU_GATE(apb0_ac97_clk, "apb0-ac97", "apb0",
395 static SUNXI_CCU_GATE(apb0_i2s0_clk, "apb0-i2s0", "apb0",
398 static SUNXI_CCU_GATE(apb0_i2s1_clk, "apb0-i2s1", "apb0",
400 static SUNXI_CCU_GATE(apb0_pio_clk, "apb0-pio", "apb0",
402 static SUNXI_CCU_GATE(apb0_ir0_clk, "apb0-ir0", "apb0",
404 static SUNXI_CCU_GATE(apb0_ir1_clk, "apb0-ir1", "apb0",
407 static SUNXI_CCU_GATE(apb0_i2s2_clk, "apb0-i2s2", "apb0",
409 static SUNXI_CCU_GATE(apb0_keypad_clk, "apb0-keypad", "apb0",
412 static SUNXI_CCU_GATE(apb1_i2c0_clk, "apb1-i2c0", "apb1",
414 static SUNXI_CCU_GATE(apb1_i2c1_clk, "apb1-i2c1", "apb1",
416 static SUNXI_CCU_GATE(apb1_i2c2_clk, "apb1-i2c2", "apb1",
419 static SUNXI_CCU_GATE(apb1_i2c3_clk, "apb1-i2c3", "apb1",
421 static SUNXI_CCU_GATE(apb1_can_clk, "apb1-can", "apb1",
423 static SUNXI_CCU_GATE(apb1_scr_clk, "apb1-scr", "apb1",
425 static SUNXI_CCU_GATE(apb1_ps20_clk, "apb1-ps20", "apb1",
427 static SUNXI_CCU_GATE(apb1_ps21_clk, "apb1-ps21", "apb1",
430 static SUNXI_CCU_GATE(apb1_i2c4_clk, "apb1-i2c4", "apb1",
432 static SUNXI_CCU_GATE(apb1_uart0_clk, "apb1-uart0", "apb1",
434 static SUNXI_CCU_GATE(apb1_uart1_clk, "apb1-uart1", "apb1",
436 static SUNXI_CCU_GATE(apb1_uart2_clk, "apb1-uart2", "apb1",
438 static SUNXI_CCU_GATE(apb1_uart3_clk, "apb1-uart3", "apb1",
440 static SUNXI_CCU_GATE(apb1_uart4_clk, "apb1-uart4", "apb1",
442 static SUNXI_CCU_GATE(apb1_uart5_clk, "apb1-uart5", "apb1",
444 static SUNXI_CCU_GATE(apb1_uart6_clk, "apb1-uart6", "apb1",
446 static SUNXI_CCU_GATE(apb1_uart7_clk, "apb1-uart7", "apb1",
449 static const char *const mod0_default_parents[] = { "hosc", "pll-periph",
450 "pll-ddr-other" };
562 static const char *const ir_parents_sun4i[] = { "hosc", "pll-periph",
563 "pll-ddr-other" };
577 static const char *const ir_parents_sun7i[] = { "hosc", "pll-periph",
578 "pll-ddr-other", "osc32k" };
593 static const char *const audio_parents[] = { "pll-audio-8x", "pll-audio-4x",
594 "pll-audio-2x", "pll-audio" };
624 * SATA-CLKM / SATA-CLKP pins.
626 static const char *const sata_parents[] = {"pll-periph-sata", "sata-ext"};
631 static SUNXI_CCU_GATE(usb_ohci0_clk, "usb-ohci0", "pll-periph",
633 static SUNXI_CCU_GATE(usb_ohci1_clk, "usb-ohci1", "pll-periph",
635 static SUNXI_CCU_GATE(usb_phy_clk, "usb-phy", "pll-periph",
655 static SUNXI_CCU_GATE(dram_ve_clk, "dram-ve", "pll-ddr",
657 static SUNXI_CCU_GATE(dram_csi0_clk, "dram-csi0", "pll-ddr",
659 static SUNXI_CCU_GATE(dram_csi1_clk, "dram-csi1", "pll-ddr",
661 static SUNXI_CCU_GATE(dram_ts_clk, "dram-ts", "pll-ddr",
663 static SUNXI_CCU_GATE(dram_tvd_clk, "dram-tvd", "pll-ddr",
665 static SUNXI_CCU_GATE(dram_tve0_clk, "dram-tve0", "pll-ddr",
667 static SUNXI_CCU_GATE(dram_tve1_clk, "dram-tve1", "pll-ddr",
671 static SUNXI_CCU_GATE(dram_out_clk, "dram-out", "pll-ddr",
673 static SUNXI_CCU_GATE(dram_de_fe1_clk, "dram-de-fe1", "pll-ddr",
675 static SUNXI_CCU_GATE(dram_de_fe0_clk, "dram-de-fe0", "pll-ddr",
677 static SUNXI_CCU_GATE(dram_de_be0_clk, "dram-de-be0", "pll-ddr",
679 static SUNXI_CCU_GATE(dram_de_be1_clk, "dram-de-be1", "pll-ddr",
681 static SUNXI_CCU_GATE(dram_mp_clk, "dram-mp", "pll-ddr",
683 static SUNXI_CCU_GATE(dram_ace_clk, "dram-ace", "pll-ddr",
686 static const char *const de_parents[] = { "pll-video0", "pll-video1",
687 "pll-ddr-other" };
688 static SUNXI_CCU_M_WITH_MUX_GATE(de_be0_clk, "de-be0", de_parents,
691 static SUNXI_CCU_M_WITH_MUX_GATE(de_be1_clk, "de-be1", de_parents,
694 static SUNXI_CCU_M_WITH_MUX_GATE(de_fe0_clk, "de-fe0", de_parents,
697 static SUNXI_CCU_M_WITH_MUX_GATE(de_fe1_clk, "de-fe1", de_parents,
701 static SUNXI_CCU_M_WITH_MUX_GATE(de_mp_clk, "de-mp", de_parents,
704 static const char *const disp_parents[] = { "pll-video0", "pll-video1",
705 "pll-video0-2x", "pll-video1-2x" };
706 static SUNXI_CCU_MUX_WITH_GATE(tcon0_ch0_clk, "tcon0-ch0-sclk", disp_parents,
708 static SUNXI_CCU_MUX_WITH_GATE(tcon1_ch0_clk, "tcon1-ch0-sclk", disp_parents,
711 static const char *const csi_sclk_parents[] = { "pll-video0", "pll-ve",
712 "pll-ddr-other", "pll-periph" };
714 static SUNXI_CCU_M_WITH_MUX_GATE(csi_sclk_clk, "csi-sclk",
719 static const char *const tvd_parents[] = { "pll-video0", "pll-video1" };
725 "tvd-sclk2", tvd_parents,
733 static SUNXI_CCU_M_WITH_GATE(tvd_sclk1_sun7i_clk, "tvd-sclk1", "tvd-sclk2",
736 static SUNXI_CCU_M_WITH_MUX_GATE(tcon0_ch1_sclk2_clk, "tcon0-ch1-sclk2",
742 "tcon0-ch1-sclk1", "tcon0-ch1-sclk2",
746 static SUNXI_CCU_M_WITH_MUX_GATE(tcon1_ch1_sclk2_clk, "tcon1-ch1-sclk2",
752 "tcon1-ch1-sclk1", "tcon1-ch1-sclk2",
756 static const char *const csi_parents[] = { "hosc", "pll-video0", "pll-video1",
757 "pll-video0-2x", "pll-video1-2x"};
767 static SUNXI_CCU_M_WITH_GATE(ve_clk, "ve", "pll-ve", 0x13c, 16, 8, BIT(31), 0);
769 static SUNXI_CCU_GATE(codec_clk, "codec", "pll-audio",
774 static const char *const ace_parents[] = { "pll-ve", "pll-ddr-other" };
782 static const char *const gpu_parents_sun4i[] = { "pll-video0", "pll-ve",
783 "pll-ddr-other",
784 "pll-video1" };
789 static const char *const gpu_parents_sun7i[] = { "pll-video0", "pll-ve",
790 "pll-ddr-other", "pll-video1",
791 "pll-gpu" };
798 static const char *const mbus_sun4i_parents[] = { "hosc", "pll-periph",
799 "pll-ddr-other" };
803 static const char *const mbus_sun7i_parents[] = { "hosc", "pll-periph-base",
804 "pll-ddr-other" };
809 static SUNXI_CCU_GATE(hdmi1_slow_clk, "hdmi1-slow", "hosc", 0x178, BIT(31), 0);
811 static const char *const hdmi1_parents[] = { "pll-video0", "pll-video1" };
836 .hw.init = CLK_HW_INIT_PARENTS("out-a",
855 .hw.init = CLK_HW_INIT_PARENTS("out-b",
1038 /* Post-divider for pll-audio is hardcoded to 1 */
1039 static CLK_FIXED_FACTOR_HWS(pll_audio_clk, "pll-audio",
1042 static CLK_FIXED_FACTOR_HWS(pll_audio_2x_clk, "pll-audio-2x",
1045 static CLK_FIXED_FACTOR_HWS(pll_audio_4x_clk, "pll-audio-4x",
1048 static CLK_FIXED_FACTOR_HWS(pll_audio_8x_clk, "pll-audio-8x",
1051 static CLK_FIXED_FACTOR_HW(pll_video0_2x_clk, "pll-video0-2x",
1054 static CLK_FIXED_FACTOR_HW(pll_video1_2x_clk, "pll-video1-2x",
1436 desc = of_device_get_match_data(&pdev->dev); in sun4i_a10_ccu_probe()
1438 return -EINVAL; in sun4i_a10_ccu_probe()
1447 * Force VCO and PLL bias current to lowest setting. Higher in sun4i_a10_ccu_probe()
1448 * settings interfere with sigma-delta modulation and result in sun4i_a10_ccu_probe()
1453 /* Force the PLL-Audio-1x divider to 1 */ in sun4i_a10_ccu_probe()
1470 return devm_sunxi_ccu_probe(&pdev->dev, reg, desc); in sun4i_a10_ccu_probe()
1475 .compatible = "allwinner,sun4i-a10-ccu",
1479 .compatible = "allwinner,sun7i-a20-ccu",
1489 .name = "sun4i-a10-ccu",