410 	struct clk_stm32_composite *composite = to_clk_stm32_composite(hw);  in clk_stm32_composite_set_rate()  local
414 	if (composite->div_id == NO_STM32_DIV)  in clk_stm32_composite_set_rate()
417 	spin_lock_irqsave(composite->lock, flags);  in clk_stm32_composite_set_rate()
419 	ret = stm32_divider_set_rate(composite->base, composite->clock_data,  in clk_stm32_composite_set_rate()
420 				     composite->div_id, rate, parent_rate);  in clk_stm32_composite_set_rate()
422 	spin_unlock_irqrestore(composite->lock, flags);  in clk_stm32_composite_set_rate()
430 	struct clk_stm32_composite *composite = to_clk_stm32_composite(hw);  in clk_stm32_composite_recalc_rate()  local
432 	if (composite->div_id == NO_STM32_DIV)  in clk_stm32_composite_recalc_rate()
435 	return stm32_divider_get_rate(composite->base, composite->clock_data,  in clk_stm32_composite_recalc_rate()
436 				      composite->div_id, parent_rate);  in clk_stm32_composite_recalc_rate()
442 	struct clk_stm32_composite *composite = to_clk_stm32_composite(hw);  in clk_stm32_composite_determine_rate()  local
446 	if (composite->div_id == NO_STM32_DIV)  in clk_stm32_composite_determine_rate()
449 	divider = &composite->clock_data->dividers[composite->div_id];  in clk_stm32_composite_determine_rate()
455 		val =  readl(composite->base + divider->offset) >> divider->shift;  in clk_stm32_composite_determine_rate()
480 	struct clk_stm32_composite *composite = to_clk_stm32_composite(hw);  in clk_stm32_composite_get_parent()  local
482 	return stm32_mux_get_parent(composite->base, composite->clock_data, composite->mux_id);  in clk_stm32_composite_get_parent()
487 	struct clk_stm32_composite *composite = to_clk_stm32_composite(hw);  in clk_stm32_composite_set_parent()  local
490 	spin_lock_irqsave(composite->lock, flags);  in clk_stm32_composite_set_parent()
492 	stm32_mux_set_parent(composite->base, composite->clock_data, composite->mux_id, index);  in clk_stm32_composite_set_parent()
494 	spin_unlock_irqrestore(composite->lock, flags);  in clk_stm32_composite_set_parent()
496 	if (composite->clock_data->is_multi_mux) {  in clk_stm32_composite_set_parent()
497 		struct clk_hw *other_mux_hw = composite->clock_data->is_multi_mux(hw);  in clk_stm32_composite_set_parent()
511 	struct clk_stm32_composite *composite = to_clk_stm32_composite(hw);  in clk_stm32_composite_is_enabled()  local
513 	if (composite->gate_id == NO_STM32_GATE)  in clk_stm32_composite_is_enabled()
516 	return stm32_gate_is_enabled(composite->base, composite->clock_data, composite->gate_id);  in clk_stm32_composite_is_enabled()
523 	struct clk_stm32_composite *composite = to_clk_stm32_composite(hw);  in clk_stm32_has_safe_mux()  local
524 	const struct stm32_mux_cfg *mux = &composite->clock_data->muxes[composite->mux_id];  in clk_stm32_has_safe_mux()
531 	struct clk_stm32_composite *composite = to_clk_stm32_composite(hw);  in clk_stm32_set_safe_position_mux()  local
536 		if (composite->clock_data->is_multi_mux) {  in clk_stm32_set_safe_position_mux()
539 			other_mux_hw = composite->clock_data->is_multi_mux(hw);  in clk_stm32_set_safe_position_mux()
545 		spin_lock_irqsave(composite->lock, flags);  in clk_stm32_set_safe_position_mux()
547 		stm32_mux_set_parent(composite->base, composite->clock_data,  in clk_stm32_set_safe_position_mux()
548 				     composite->mux_id, MUX_SAFE_POSITION);  in clk_stm32_set_safe_position_mux()
550 		spin_unlock_irqrestore(composite->lock, flags);  in clk_stm32_set_safe_position_mux()
556 	struct clk_stm32_composite *composite = to_clk_stm32_composite(hw);  in clk_stm32_safe_restore_position_mux()  local
560 	spin_lock_irqsave(composite->lock, flags);  in clk_stm32_safe_restore_position_mux()
562 	stm32_mux_set_parent(composite->base, composite->clock_data, composite->mux_id, sel);  in clk_stm32_safe_restore_position_mux()
564 	spin_unlock_irqrestore(composite->lock, flags);  in clk_stm32_safe_restore_position_mux()
569 	struct clk_stm32_composite *composite = to_clk_stm32_composite(hw);  in clk_stm32_composite_gate_endisable()  local
572 	spin_lock_irqsave(composite->lock, flags);  in clk_stm32_composite_gate_endisable()
574 	stm32_gate_endisable(composite->base, composite->clock_data, composite->gate_id, enable);  in clk_stm32_composite_gate_endisable()
576 	spin_unlock_irqrestore(composite->lock, flags);  in clk_stm32_composite_gate_endisable()
581 	struct clk_stm32_composite *composite = to_clk_stm32_composite(hw);  in clk_stm32_composite_gate_enable()  local
583 	if (composite->gate_id == NO_STM32_GATE)  in clk_stm32_composite_gate_enable()
588 	if (composite->mux_id != NO_STM32_MUX && clk_stm32_has_safe_mux(hw))  in clk_stm32_composite_gate_enable()
596 	struct clk_stm32_composite *composite = to_clk_stm32_composite(hw);  in clk_stm32_composite_gate_disable()  local
598 	if (composite->gate_id == NO_STM32_GATE)  in clk_stm32_composite_gate_disable()
603 	if (composite->mux_id != NO_STM32_MUX && clk_stm32_has_safe_mux(hw))  in clk_stm32_composite_gate_disable()
609 	struct clk_stm32_composite *composite = to_clk_stm32_composite(hw);  in clk_stm32_composite_disable_unused()  local
612 	if (composite->gate_id == NO_STM32_GATE)  in clk_stm32_composite_disable_unused()
615 	spin_lock_irqsave(composite->lock, flags);  in clk_stm32_composite_disable_unused()
617 	stm32_gate_disable_unused(composite->base, composite->clock_data, composite->gate_id);  in clk_stm32_composite_disable_unused()
619 	spin_unlock_irqrestore(composite->lock, flags);  in clk_stm32_composite_disable_unused()
703 	struct clk_stm32_composite *composite = cfg->clock_cfg;  in clk_stm32_composite_register()  local
704 	struct clk_hw *hw = &composite->hw;  in clk_stm32_composite_register()
707 	composite->base = base;  in clk_stm32_composite_register()
708 	composite->lock = lock;  in clk_stm32_composite_register()
709 	composite->clock_data = data->clock_data;  in clk_stm32_composite_register()