1 // SPDX-License-Identifier: GPL-2.0
3  * StarFive JH7100 Clock Generator Driver
10 #include <linux/clk-provider.h>
16 #include <dt-bindings/clock/starfive-jh7100.h>
18 #include "clk-starfive-jh71x0.h"
273 	unsigned int idx = clkspec->args[0];  in jh7100_clk_get()
276 		return &priv->reg[idx].hw;  in jh7100_clk_get()
279 		return priv->pll[idx - JH7100_CLK_PLL0_OUT];  in jh7100_clk_get()
281 	return ERR_PTR(-EINVAL);  in jh7100_clk_get()
290 	priv = devm_kzalloc(&pdev->dev, struct_size(priv, reg, JH7100_CLK_PLL0_OUT), GFP_KERNEL);  in clk_starfive_jh7100_probe()
292 		return -ENOMEM;  in clk_starfive_jh7100_probe()
294 	spin_lock_init(&priv->rmw_lock);  in clk_starfive_jh7100_probe()
295 	priv->dev = &pdev->dev;  in clk_starfive_jh7100_probe()
296 	priv->base = devm_platform_ioremap_resource(pdev, 0);  in clk_starfive_jh7100_probe()
297 	if (IS_ERR(priv->base))  in clk_starfive_jh7100_probe()
298 		return PTR_ERR(priv->base);  in clk_starfive_jh7100_probe()
300 	priv->pll[0] = devm_clk_hw_register_fixed_factor(priv->dev, "pll0_out",  in clk_starfive_jh7100_probe()
302 	if (IS_ERR(priv->pll[0]))  in clk_starfive_jh7100_probe()
303 		return PTR_ERR(priv->pll[0]);  in clk_starfive_jh7100_probe()
305 	priv->pll[1] = devm_clk_hw_register_fixed_factor(priv->dev, "pll1_out",  in clk_starfive_jh7100_probe()
307 	if (IS_ERR(priv->pll[1]))  in clk_starfive_jh7100_probe()
308 		return PTR_ERR(priv->pll[1]);  in clk_starfive_jh7100_probe()
310 	priv->pll[2] = devm_clk_hw_register_fixed_factor(priv->dev, "pll2_out",  in clk_starfive_jh7100_probe()
312 	if (IS_ERR(priv->pll[2]))  in clk_starfive_jh7100_probe()
313 		return PTR_ERR(priv->pll[2]);  in clk_starfive_jh7100_probe()
325 		struct jh71x0_clk *clk = &priv->reg[idx];  in clk_starfive_jh7100_probe()
332 				parents[i].hw = &priv->reg[pidx].hw;  in clk_starfive_jh7100_probe()
334 				parents[i].hw = priv->pll[pidx - JH7100_CLK_PLL0_OUT];  in clk_starfive_jh7100_probe()
345 		clk->hw.init = &init;  in clk_starfive_jh7100_probe()
346 		clk->idx = idx;  in clk_starfive_jh7100_probe()
347 		clk->max_div = max & JH71X0_CLK_DIV_MASK;  in clk_starfive_jh7100_probe()
349 		ret = devm_clk_hw_register(priv->dev, &clk->hw);  in clk_starfive_jh7100_probe()
354 	return devm_of_clk_add_hw_provider(priv->dev, jh7100_clk_get, priv);  in clk_starfive_jh7100_probe()
358 	{ .compatible = "starfive,jh7100-clkgen" },
364 		.name = "clk-starfive-jh7100",