Lines Matching +full:hw +full:- +full:cal +full:- +full:a
1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/clk-provider.h>
16 #include <dt-bindings/clock/sprd,sc9860-clk.h>
25 static CLK_FIXED_FACTOR(fac_4m, "fac-4m", "ext-26m",
27 static CLK_FIXED_FACTOR(fac_2m, "fac-2m", "ext-26m",
29 static CLK_FIXED_FACTOR(fac_1m, "fac-1m", "ext-26m",
31 static CLK_FIXED_FACTOR(fac_250k, "fac-250k", "ext-26m",
33 static CLK_FIXED_FACTOR(fac_rpll0_26m, "rpll0-26m", "ext-26m",
35 static CLK_FIXED_FACTOR(fac_rpll1_26m, "rpll1-26m", "ext-26m",
37 static CLK_FIXED_FACTOR(fac_rco_25m, "rco-25m", "ext-rc0-100m",
39 static CLK_FIXED_FACTOR(fac_rco_4m, "rco-4m", "ext-rc0-100m",
41 static CLK_FIXED_FACTOR(fac_rco_2m, "rco-2m", "ext-rc0-100m",
43 static CLK_FIXED_FACTOR(fac_3k2, "fac-3k2", "ext-32k",
45 static CLK_FIXED_FACTOR(fac_1k, "fac-1k", "ext-32k",
48 static SPRD_SC_GATE_CLK(mpll0_gate, "mpll0-gate", "ext-26m", 0xb0,
50 static SPRD_SC_GATE_CLK(mpll1_gate, "mpll1-gate", "ext-26m", 0xb0,
52 static SPRD_SC_GATE_CLK(dpll0_gate, "dpll0-gate", "ext-26m", 0xb4,
54 static SPRD_SC_GATE_CLK(dpll1_gate, "dpll1-gate", "ext-26m", 0xb4,
56 static SPRD_SC_GATE_CLK(ltepll0_gate, "ltepll0-gate", "ext-26m", 0xb8,
58 static SPRD_SC_GATE_CLK(twpll_gate, "twpll-gate", "ext-26m", 0xbc,
60 static SPRD_SC_GATE_CLK(ltepll1_gate, "ltepll1-gate", "ext-26m", 0x10c,
62 static SPRD_SC_GATE_CLK(rpll0_gate, "rpll0-gate", "ext-26m", 0x16c,
64 static SPRD_SC_GATE_CLK(rpll1_gate, "rpll1-gate", "ext-26m", 0x16c,
66 static SPRD_SC_GATE_CLK(cppll_gate, "cppll-gate", "ext-26m", 0x2b4,
68 static SPRD_SC_GATE_CLK(gpll_gate, "gpll-gate", "ext-26m", 0x32c,
88 [CLK_FAC_4M] = &fac_4m.hw,
89 [CLK_FAC_2M] = &fac_2m.hw,
90 [CLK_FAC_1M] = &fac_1m.hw,
91 [CLK_FAC_250K] = &fac_250k.hw,
92 [CLK_FAC_RPLL0_26M] = &fac_rpll0_26m.hw,
93 [CLK_FAC_RPLL1_26M] = &fac_rpll1_26m.hw,
94 [CLK_FAC_RCO25M] = &fac_rco_25m.hw,
95 [CLK_FAC_RCO4M] = &fac_rco_4m.hw,
96 [CLK_FAC_RCO2M] = &fac_rco_2m.hw,
97 [CLK_FAC_3K2] = &fac_3k2.hw,
98 [CLK_FAC_1K] = &fac_1k.hw,
99 [CLK_MPLL0_GATE] = &mpll0_gate.common.hw,
100 [CLK_MPLL1_GATE] = &mpll1_gate.common.hw,
101 [CLK_DPLL0_GATE] = &dpll0_gate.common.hw,
102 [CLK_DPLL1_GATE] = &dpll1_gate.common.hw,
103 [CLK_LTEPLL0_GATE] = <epll0_gate.common.hw,
104 [CLK_TWPLL_GATE] = &twpll_gate.common.hw,
105 [CLK_LTEPLL1_GATE] = <epll1_gate.common.hw,
106 [CLK_RPLL0_GATE] = &rpll0_gate.common.hw,
107 [CLK_RPLL1_GATE] = &rpll1_gate.common.hw,
108 [CLK_CPPLL_GATE] = &cppll_gate.common.hw,
109 [CLK_GPLL_GATE] = &gpll_gate.common.hw,
139 static SPRD_PLL_WITH_ITABLE_K_FVCO(mpll0_clk, "mpll0", "mpll0-gate", 0x24,
156 static SPRD_PLL_WITH_ITABLE_1K(mpll1_clk, "mpll1", "mpll1-gate", 0x2c,
172 static SPRD_PLL_WITH_ITABLE_1K(dpll0_clk, "dpll0", "dpll0-gate", 0x34,
175 static SPRD_PLL_WITH_ITABLE_1K(dpll1_clk, "dpll1", "dpll1-gate", 0x3c,
191 static SPRD_PLL_WITH_ITABLE_1K(rpll0_clk, "rpll0", "rpll0-gate", 0x44,
194 static SPRD_PLL_WITH_ITABLE_1K(rpll1_clk, "rpll1", "rpll1-gate", 0x50,
210 static SPRD_PLL_WITH_ITABLE_1K(twpll_clk, "twpll", "twpll-gate", 0x5c,
226 static SPRD_PLL_WITH_ITABLE_1K(ltepll0_clk, "ltepll0", "ltepll0-gate",
229 static SPRD_PLL_WITH_ITABLE_1K(ltepll1_clk, "ltepll1", "ltepll1-gate",
246 static SPRD_PLL_WITH_ITABLE_K_FVCO(gpll_clk, "gpll", "gpll-gate", 0x9c,
263 static SPRD_PLL_WITH_ITABLE_1K(cppll_clk, "cppll", "cppll-gate", 0xc4,
266 static CLK_FIXED_FACTOR(gpll_42m5, "gpll-42m5", "gpll", 20, 1, 0);
267 static CLK_FIXED_FACTOR(twpll_768m, "twpll-768m", "twpll", 2, 1, 0);
268 static CLK_FIXED_FACTOR(twpll_384m, "twpll-384m", "twpll", 4, 1, 0);
269 static CLK_FIXED_FACTOR(twpll_192m, "twpll-192m", "twpll", 8, 1, 0);
270 static CLK_FIXED_FACTOR(twpll_96m, "twpll-96m", "twpll", 16, 1, 0);
271 static CLK_FIXED_FACTOR(twpll_48m, "twpll-48m", "twpll", 32, 1, 0);
272 static CLK_FIXED_FACTOR(twpll_24m, "twpll-24m", "twpll", 64, 1, 0);
273 static CLK_FIXED_FACTOR(twpll_12m, "twpll-12m", "twpll", 128, 1, 0);
274 static CLK_FIXED_FACTOR(twpll_512m, "twpll-512m", "twpll", 3, 1, 0);
275 static CLK_FIXED_FACTOR(twpll_256m, "twpll-256m", "twpll", 6, 1, 0);
276 static CLK_FIXED_FACTOR(twpll_128m, "twpll-128m", "twpll", 12, 1, 0);
277 static CLK_FIXED_FACTOR(twpll_64m, "twpll-64m", "twpll", 24, 1, 0);
278 static CLK_FIXED_FACTOR(twpll_307m2, "twpll-307m2", "twpll", 5, 1, 0);
279 static CLK_FIXED_FACTOR(twpll_153m6, "twpll-153m6", "twpll", 10, 1, 0);
280 static CLK_FIXED_FACTOR(twpll_76m8, "twpll-76m8", "twpll", 20, 1, 0);
281 static CLK_FIXED_FACTOR(twpll_51m2, "twpll-51m2", "twpll", 30, 1, 0);
282 static CLK_FIXED_FACTOR(twpll_38m4, "twpll-38m4", "twpll", 40, 1, 0);
283 static CLK_FIXED_FACTOR(twpll_19m2, "twpll-19m2", "twpll", 80, 1, 0);
284 static CLK_FIXED_FACTOR(l0_614m4, "l0-614m4", "ltepll0", 2, 1, 0);
285 static CLK_FIXED_FACTOR(l0_409m6, "l0-409m6", "ltepll0", 3, 1, 0);
286 static CLK_FIXED_FACTOR(l0_38m, "l0-38m", "ltepll0", 32, 1, 0);
287 static CLK_FIXED_FACTOR(l1_38m, "l1-38m", "ltepll1", 32, 1, 0);
288 static CLK_FIXED_FACTOR(rpll0_192m, "rpll0-192m", "rpll0", 6, 1, 0);
289 static CLK_FIXED_FACTOR(rpll0_96m, "rpll0-96m", "rpll0", 12, 1, 0);
290 static CLK_FIXED_FACTOR(rpll0_48m, "rpll0-48m", "rpll0", 24, 1, 0);
291 static CLK_FIXED_FACTOR(rpll1_468m, "rpll1-468m", "rpll1", 2, 1, 0);
292 static CLK_FIXED_FACTOR(rpll1_192m, "rpll1-192m", "rpll1", 6, 1, 0);
293 static CLK_FIXED_FACTOR(rpll1_96m, "rpll1-96m", "rpll1", 12, 1, 0);
294 static CLK_FIXED_FACTOR(rpll1_64m, "rpll1-64m", "rpll1", 18, 1, 0);
295 static CLK_FIXED_FACTOR(rpll1_48m, "rpll1-48m", "rpll1", 24, 1, 0);
296 static CLK_FIXED_FACTOR(dpll0_50m, "dpll0-50m", "dpll0", 16, 1, 0);
297 static CLK_FIXED_FACTOR(dpll1_50m, "dpll1-50m", "dpll1", 16, 1, 0);
298 static CLK_FIXED_FACTOR(cppll_50m, "cppll-50m", "cppll", 18, 1, 0);
299 static CLK_FIXED_FACTOR(m0_39m, "m0-39m", "mpll0", 32, 1, 0);
300 static CLK_FIXED_FACTOR(m1_63m, "m1-63m", "mpll1", 32, 1, 0);
319 [CLK_MPLL0] = &mpll0_clk.common.hw,
320 [CLK_MPLL1] = &mpll1_clk.common.hw,
321 [CLK_DPLL0] = &dpll0_clk.common.hw,
322 [CLK_DPLL1] = &dpll1_clk.common.hw,
323 [CLK_RPLL0] = &rpll0_clk.common.hw,
324 [CLK_RPLL1] = &rpll1_clk.common.hw,
325 [CLK_TWPLL] = &twpll_clk.common.hw,
326 [CLK_LTEPLL0] = <epll0_clk.common.hw,
327 [CLK_LTEPLL1] = <epll1_clk.common.hw,
328 [CLK_GPLL] = &gpll_clk.common.hw,
329 [CLK_CPPLL] = &cppll_clk.common.hw,
330 [CLK_GPLL_42M5] = &gpll_42m5.hw,
331 [CLK_TWPLL_768M] = &twpll_768m.hw,
332 [CLK_TWPLL_384M] = &twpll_384m.hw,
333 [CLK_TWPLL_192M] = &twpll_192m.hw,
334 [CLK_TWPLL_96M] = &twpll_96m.hw,
335 [CLK_TWPLL_48M] = &twpll_48m.hw,
336 [CLK_TWPLL_24M] = &twpll_24m.hw,
337 [CLK_TWPLL_12M] = &twpll_12m.hw,
338 [CLK_TWPLL_512M] = &twpll_512m.hw,
339 [CLK_TWPLL_256M] = &twpll_256m.hw,
340 [CLK_TWPLL_128M] = &twpll_128m.hw,
341 [CLK_TWPLL_64M] = &twpll_64m.hw,
342 [CLK_TWPLL_307M2] = &twpll_307m2.hw,
343 [CLK_TWPLL_153M6] = &twpll_153m6.hw,
344 [CLK_TWPLL_76M8] = &twpll_76m8.hw,
345 [CLK_TWPLL_51M2] = &twpll_51m2.hw,
346 [CLK_TWPLL_38M4] = &twpll_38m4.hw,
347 [CLK_TWPLL_19M2] = &twpll_19m2.hw,
348 [CLK_L0_614M4] = &l0_614m4.hw,
349 [CLK_L0_409M6] = &l0_409m6.hw,
350 [CLK_L0_38M] = &l0_38m.hw,
351 [CLK_L1_38M] = &l1_38m.hw,
352 [CLK_RPLL0_192M] = &rpll0_192m.hw,
353 [CLK_RPLL0_96M] = &rpll0_96m.hw,
354 [CLK_RPLL0_48M] = &rpll0_48m.hw,
355 [CLK_RPLL1_468M] = &rpll1_468m.hw,
356 [CLK_RPLL1_192M] = &rpll1_192m.hw,
357 [CLK_RPLL1_96M] = &rpll1_96m.hw,
358 [CLK_RPLL1_64M] = &rpll1_64m.hw,
359 [CLK_RPLL1_48M] = &rpll1_48m.hw,
360 [CLK_DPLL0_50M] = &dpll0_50m.hw,
361 [CLK_DPLL1_50M] = &dpll1_50m.hw,
362 [CLK_CPPLL_50M] = &cppll_50m.hw,
363 [CLK_M0_39M] = &m0_39m.hw,
364 [CLK_M1_63M] = &m1_63m.hw,
378 static const char * const ap_apb_parents[] = { "ext-26m", "twpll-64m",
379 "twpll-96m", "twpll-128m" };
380 static SPRD_MUX_CLK(ap_apb, "ap-apb", ap_apb_parents,
383 static const char * const ap_apb_usb3[] = { "ext-32k", "twpll-24m" };
384 static SPRD_MUX_CLK(ap_usb3, "ap-usb3", ap_apb_usb3,
387 static const char * const uart_parents[] = { "ext-26m", "twpll-48m",
388 "twpll-51m2", "twpll-96m" };
400 static const char * const i2c_parents[] = { "ext-26m", "twpll-48m",
401 "twpll-51m2", "twpll-153m6" };
415 static const char * const spi_parents[] = { "ext-26m", "twpll-128m",
416 "twpll-153m6", "twpll-192m" };
426 static const char * const iis_parents[] = { "ext-26m",
427 "twpll-128m",
428 "twpll-153m6" };
465 [CLK_AP_APB] = &ap_apb.common.hw,
466 [CLK_AP_USB3] = &ap_usb3.common.hw,
467 [CLK_UART0] = &uart0_clk.common.hw,
468 [CLK_UART1] = &uart1_clk.common.hw,
469 [CLK_UART2] = &uart2_clk.common.hw,
470 [CLK_UART3] = &uart3_clk.common.hw,
471 [CLK_UART4] = &uart4_clk.common.hw,
472 [CLK_I2C0] = &i2c0_clk.common.hw,
473 [CLK_I2C1] = &i2c1_clk.common.hw,
474 [CLK_I2C2] = &i2c2_clk.common.hw,
475 [CLK_I2C3] = &i2c3_clk.common.hw,
476 [CLK_I2C4] = &i2c4_clk.common.hw,
477 [CLK_I2C5] = &i2c5_clk.common.hw,
478 [CLK_SPI0] = &spi0_clk.common.hw,
479 [CLK_SPI1] = &spi1_clk.common.hw,
480 [CLK_SPI2] = &spi2_clk.common.hw,
481 [CLK_SPI3] = &spi3_clk.common.hw,
482 [CLK_IIS0] = &iis0_clk.common.hw,
483 [CLK_IIS1] = &iis1_clk.common.hw,
484 [CLK_IIS2] = &iis2_clk.common.hw,
485 [CLK_IIS3] = &iis3_clk.common.hw,
496 static const char * const aon_apb_parents[] = { "rco-25m", "ext-26m",
497 "ext-rco-100m", "twpll-96m",
498 "twpll-128m",
499 "twpll-153m6" };
500 static SPRD_COMP_CLK(aon_apb, "aon-apb", aon_apb_parents, 0x230,
503 static const char * const aux_parents[] = { "ext-32k", "rpll0-26m",
504 "rpll1-26m", "ext-26m",
505 "cppll-50m", "rco-25m",
506 "dpll0-50m", "dpll1-50m",
507 "gpll-42m5", "twpll-48m",
508 "m0-39m", "m1-63m",
509 "l0-38m", "l1-38m" };
520 static const char * const sp_ahb_parents[] = { "rco-4m", "ext-26m",
521 "ext-rco-100m", "twpll-96m",
522 "twpll-128m",
523 "twpll-153m6" };
524 static SPRD_COMP_CLK(sp_ahb, "sp-ahb", sp_ahb_parents, 0x2d0,
527 static const char * const cci_parents[] = { "ext-26m", "twpll-384m",
528 "l0-614m4", "twpll-768m" };
536 static const char * const sdio_2x_parents[] = { "fac-1m", "ext-26m",
537 "twpll-307m2", "twpll-384m",
538 "l0-409m6" };
539 static SPRD_COMP_CLK(sdio0_2x, "sdio0-2x", sdio_2x_parents, 0x328,
541 static SPRD_COMP_CLK(sdio1_2x, "sdio1-2x", sdio_2x_parents, 0x330,
543 static SPRD_COMP_CLK(sdio2_2x, "sdio2-2x", sdio_2x_parents, 0x338,
545 static SPRD_COMP_CLK(emmc_2x, "emmc-2x", sdio_2x_parents, 0x340,
548 static SPRD_DIV_CLK(sdio0_1x, "sdio0-1x", "sdio0-2x", 0x32c,
550 static SPRD_DIV_CLK(sdio1_1x, "sdio1-1x", "sdio1-2x", 0x334,
552 static SPRD_DIV_CLK(sdio2_1x, "sdio2-1x", "sdio2-2x", 0x33c,
554 static SPRD_DIV_CLK(emmc_1x, "emmc-1x", "emmc-2x", 0x344,
557 static const char * const adi_parents[] = { "rco-4m", "ext-26m",
558 "rco-25m", "twpll-38m4",
559 "twpll-51m2" };
563 static const char * const pwm_parents[] = { "ext-32k", "ext-26m",
564 "rco-4m", "rco-25m",
565 "twpll-48m" };
575 static const char * const efuse_parents[] = { "rco-25m", "ext-26m" };
579 static const char * const cm3_uart_parents[] = { "rco-4m", "ext-26m",
580 "rco-100m", "twpll-48m",
581 "twpll-51m2", "twpll-96m",
582 "twpll-128m" };
583 static SPRD_MUX_CLK(cm3_uart0, "cm3-uart0", cm3_uart_parents, 0x25c,
585 static SPRD_MUX_CLK(cm3_uart1, "cm3-uart1", cm3_uart_parents, 0x260,
588 static const char * const thm_parents[] = { "ext-32k", "fac-250k" };
592 static const char * const cm3_i2c_parents[] = { "rco-4m",
593 "ext-26m",
594 "rco-100m",
595 "twpll-48m",
596 "twpll-51m2",
597 "twpll-153m6" };
598 static SPRD_MUX_CLK(cm3_i2c0, "cm3-i2c0", cm3_i2c_parents, 0x274,
600 static SPRD_MUX_CLK(cm3_i2c1, "cm3-i2c1", cm3_i2c_parents, 0x278,
602 static SPRD_MUX_CLK(aon_i2c, "aon-i2c", cm3_i2c_parents, 0x280,
605 static const char * const cm4_spi_parents[] = { "ext-26m", "twpll-96m",
606 "rco-100m", "twpll-128m",
607 "twpll-153m6", "twpll-192m" };
608 static SPRD_MUX_CLK(cm4_spi, "cm4-spi", cm4_spi_parents, 0x27c,
614 static const char * const ca53_dap_parents[] = { "ext-26m", "rco-4m",
615 "rco-100m", "twpll-76m8",
616 "twpll-128m", "twpll-153m6" };
617 static SPRD_MUX_CLK(ca53_dap, "ca53-dap", ca53_dap_parents, 0x288,
620 static const char * const ca53_ts_parents[] = { "ext-32k", "ext-26m",
621 "clk-twpll-128m",
622 "clk-twpll-153m6" };
623 static SPRD_MUX_CLK(ca53_ts, "ca53-ts", ca53_ts_parents, 0x290,
626 static const char * const djtag_tck_parents[] = { "rco-4m", "ext-26m" };
627 static SPRD_MUX_CLK(djtag_tck, "djtag-tck", djtag_tck_parents, 0x2c8,
630 static const char * const pmu_parents[] = { "ext-32k", "rco-4m", "clk-4m" };
634 static const char * const pmu_26m_parents[] = { "rco-25m", "ext-26m" };
635 static SPRD_MUX_CLK(pmu_26m, "pmu-26m", pmu_26m_parents, 0x2e4,
638 static const char * const debounce_parents[] = { "ext-32k", "rco-4m",
639 "rco-25m", "ext-26m" };
643 static const char * const otg2_ref_parents[] = { "twpll-12m", "twpll-24m" };
644 static SPRD_MUX_CLK(otg2_ref, "otg2-ref", otg2_ref_parents, 0x2f4,
647 static const char * const usb3_ref_parents[] = { "twpll-24m", "twpll-19m2",
648 "twpll-48m" };
649 static SPRD_MUX_CLK(usb3_ref, "usb3-ref", usb3_ref_parents, 0x2f8,
652 static const char * const ap_axi_parents[] = { "ext-26m", "twpll-76m8",
653 "twpll-128m", "twpll-256m" };
654 static SPRD_MUX_CLK(ap_axi, "ap-axi", ap_axi_parents, 0x324,
703 [CLK_AON_APB] = &aon_apb.common.hw,
704 [CLK_AUX0] = &aux0_clk.common.hw,
705 [CLK_AUX1] = &aux1_clk.common.hw,
706 [CLK_AUX2] = &aux2_clk.common.hw,
707 [CLK_PROBE] = &probe_clk.common.hw,
708 [CLK_SP_AHB] = &sp_ahb.common.hw,
709 [CLK_CCI] = &cci_clk.common.hw,
710 [CLK_GIC] = &gic_clk.common.hw,
711 [CLK_CSSYS] = &cssys_clk.common.hw,
712 [CLK_SDIO0_2X] = &sdio0_2x.common.hw,
713 [CLK_SDIO1_2X] = &sdio1_2x.common.hw,
714 [CLK_SDIO2_2X] = &sdio2_2x.common.hw,
715 [CLK_EMMC_2X] = &emmc_2x.common.hw,
716 [CLK_SDIO0_1X] = &sdio0_1x.common.hw,
717 [CLK_SDIO1_1X] = &sdio1_1x.common.hw,
718 [CLK_SDIO2_1X] = &sdio2_1x.common.hw,
719 [CLK_EMMC_1X] = &emmc_1x.common.hw,
720 [CLK_ADI] = &adi_clk.common.hw,
721 [CLK_PWM0] = &pwm0_clk.common.hw,
722 [CLK_PWM1] = &pwm1_clk.common.hw,
723 [CLK_PWM2] = &pwm2_clk.common.hw,
724 [CLK_PWM3] = &pwm3_clk.common.hw,
725 [CLK_EFUSE] = &efuse_clk.common.hw,
726 [CLK_CM3_UART0] = &cm3_uart0.common.hw,
727 [CLK_CM3_UART1] = &cm3_uart1.common.hw,
728 [CLK_THM] = &thm_clk.common.hw,
729 [CLK_CM3_I2C0] = &cm3_i2c0.common.hw,
730 [CLK_CM3_I2C1] = &cm3_i2c1.common.hw,
731 [CLK_CM4_SPI] = &cm4_spi.common.hw,
732 [CLK_AON_I2C] = &aon_i2c.common.hw,
733 [CLK_AVS] = &avs_clk.common.hw,
734 [CLK_CA53_DAP] = &ca53_dap.common.hw,
735 [CLK_CA53_TS] = &ca53_ts.common.hw,
736 [CLK_DJTAG_TCK] = &djtag_tck.common.hw,
737 [CLK_PMU] = &pmu_clk.common.hw,
738 [CLK_PMU_26M] = &pmu_26m.common.hw,
739 [CLK_DEBOUNCE] = &debounce_clk.common.hw,
740 [CLK_OTG2_REF] = &otg2_ref.common.hw,
741 [CLK_USB3_REF] = &usb3_ref.common.hw,
742 [CLK_AP_AXI] = &ap_axi.common.hw,
753 static SPRD_SC_GATE_CLK(usb3_eb, "usb3-eb", "ap-axi", 0x0,
755 static SPRD_SC_GATE_CLK(usb3_suspend, "usb3-suspend", "ap-axi", 0x0,
757 static SPRD_SC_GATE_CLK(usb3_ref_eb, "usb3-ref-eb", "ap-axi", 0x0,
759 static SPRD_SC_GATE_CLK(dma_eb, "dma-eb", "ap-axi", 0x0,
761 static SPRD_SC_GATE_CLK(sdio0_eb, "sdio0-eb", "ap-axi", 0x0,
763 static SPRD_SC_GATE_CLK(sdio1_eb, "sdio1-eb", "ap-axi", 0x0,
765 static SPRD_SC_GATE_CLK(sdio2_eb, "sdio2-eb", "ap-axi", 0x0,
767 static SPRD_SC_GATE_CLK(emmc_eb, "emmc-eb", "ap-axi", 0x0,
769 static SPRD_SC_GATE_CLK(rom_eb, "rom-eb", "ap-axi", 0x0,
771 static SPRD_SC_GATE_CLK(busmon_eb, "busmon-eb", "ap-axi", 0x0,
773 static SPRD_SC_GATE_CLK(cc63s_eb, "cc63s-eb", "ap-axi", 0x0,
775 static SPRD_SC_GATE_CLK(cc63p_eb, "cc63p-eb", "ap-axi", 0x0,
777 static SPRD_SC_GATE_CLK(ce0_eb, "ce0-eb", "ap-axi", 0x0,
779 static SPRD_SC_GATE_CLK(ce1_eb, "ce1-eb", "ap-axi", 0x0,
802 [CLK_USB3_EB] = &usb3_eb.common.hw,
803 [CLK_USB3_SUSPEND_EB] = &usb3_suspend.common.hw,
804 [CLK_USB3_REF_EB] = &usb3_ref_eb.common.hw,
805 [CLK_DMA_EB] = &dma_eb.common.hw,
806 [CLK_SDIO0_EB] = &sdio0_eb.common.hw,
807 [CLK_SDIO1_EB] = &sdio1_eb.common.hw,
808 [CLK_SDIO2_EB] = &sdio2_eb.common.hw,
809 [CLK_EMMC_EB] = &emmc_eb.common.hw,
810 [CLK_ROM_EB] = &rom_eb.common.hw,
811 [CLK_BUSMON_EB] = &busmon_eb.common.hw,
812 [CLK_CC63S_EB] = &cc63s_eb.common.hw,
813 [CLK_CC63P_EB] = &cc63p_eb.common.hw,
814 [CLK_CE0_EB] = &ce0_eb.common.hw,
815 [CLK_CE1_EB] = &ce1_eb.common.hw,
826 static SPRD_SC_GATE_CLK(avs_lit_eb, "avs-lit-eb", "aon-apb", 0x0,
828 static SPRD_SC_GATE_CLK(avs_big_eb, "avs-big-eb", "aon-apb", 0x0,
830 static SPRD_SC_GATE_CLK(ap_intc5_eb, "ap-intc5-eb", "aon-apb", 0x0,
832 static SPRD_SC_GATE_CLK(gpio_eb, "gpio-eb", "aon-apb", 0x0,
834 static SPRD_SC_GATE_CLK(pwm0_eb, "pwm0-eb", "aon-apb", 0x0,
836 static SPRD_SC_GATE_CLK(pwm1_eb, "pwm1-eb", "aon-apb", 0x0,
838 static SPRD_SC_GATE_CLK(pwm2_eb, "pwm2-eb", "aon-apb", 0x0,
840 static SPRD_SC_GATE_CLK(pwm3_eb, "pwm3-eb", "aon-apb", 0x0,
842 static SPRD_SC_GATE_CLK(kpd_eb, "kpd-eb", "aon-apb", 0x0,
844 static SPRD_SC_GATE_CLK(aon_sys_eb, "aon-sys-eb", "aon-apb", 0x0,
846 static SPRD_SC_GATE_CLK(ap_sys_eb, "ap-sys-eb", "aon-apb", 0x0,
848 static SPRD_SC_GATE_CLK(aon_tmr_eb, "aon-tmr-eb", "aon-apb", 0x0,
850 static SPRD_SC_GATE_CLK(ap_tmr0_eb, "ap-tmr0-eb", "aon-apb", 0x0,
852 static SPRD_SC_GATE_CLK(efuse_eb, "efuse-eb", "aon-apb", 0x0,
854 static SPRD_SC_GATE_CLK(eic_eb, "eic-eb", "aon-apb", 0x0,
856 static SPRD_SC_GATE_CLK(pub1_reg_eb, "pub1-reg-eb", "aon-apb", 0x0,
858 static SPRD_SC_GATE_CLK(adi_eb, "adi-eb", "aon-apb", 0x0,
860 static SPRD_SC_GATE_CLK(ap_intc0_eb, "ap-intc0-eb", "aon-apb", 0x0,
862 static SPRD_SC_GATE_CLK(ap_intc1_eb, "ap-intc1-eb", "aon-apb", 0x0,
864 static SPRD_SC_GATE_CLK(ap_intc2_eb, "ap-intc2-eb", "aon-apb", 0x0,
866 static SPRD_SC_GATE_CLK(ap_intc3_eb, "ap-intc3-eb", "aon-apb", 0x0,
868 static SPRD_SC_GATE_CLK(ap_intc4_eb, "ap-intc4-eb", "aon-apb", 0x0,
870 static SPRD_SC_GATE_CLK(splk_eb, "splk-eb", "aon-apb", 0x0,
872 static SPRD_SC_GATE_CLK(mspi_eb, "mspi-eb", "aon-apb", 0x0,
874 static SPRD_SC_GATE_CLK(pub0_reg_eb, "pub0-reg-eb", "aon-apb", 0x0,
876 static SPRD_SC_GATE_CLK(pin_eb, "pin-eb", "aon-apb", 0x0,
878 static SPRD_SC_GATE_CLK(aon_ckg_eb, "aon-ckg-eb", "aon-apb", 0x0,
880 static SPRD_SC_GATE_CLK(gpu_eb, "gpu-eb", "aon-apb", 0x0,
882 static SPRD_SC_GATE_CLK(apcpu_ts0_eb, "apcpu-ts0-eb", "aon-apb", 0x0,
884 static SPRD_SC_GATE_CLK(apcpu_ts1_eb, "apcpu-ts1-eb", "aon-apb", 0x0,
886 static SPRD_SC_GATE_CLK(dap_eb, "dap-eb", "aon-apb", 0x0,
888 static SPRD_SC_GATE_CLK(i2c_eb, "i2c-eb", "aon-apb", 0x0,
890 static SPRD_SC_GATE_CLK(pmu_eb, "pmu-eb", "aon-apb", 0x4,
892 static SPRD_SC_GATE_CLK(thm_eb, "thm-eb", "aon-apb", 0x4,
894 static SPRD_SC_GATE_CLK(aux0_eb, "aux0-eb", "aon-apb", 0x4,
896 static SPRD_SC_GATE_CLK(aux1_eb, "aux1-eb", "aon-apb", 0x4,
898 static SPRD_SC_GATE_CLK(aux2_eb, "aux2-eb", "aon-apb", 0x4,
900 static SPRD_SC_GATE_CLK(probe_eb, "probe-eb", "aon-apb", 0x4,
902 static SPRD_SC_GATE_CLK(gpu0_avs_eb, "gpu0-avs-eb", "aon-apb", 0x4,
904 static SPRD_SC_GATE_CLK(gpu1_avs_eb, "gpu1-avs-eb", "aon-apb", 0x4,
906 static SPRD_SC_GATE_CLK(apcpu_wdg_eb, "apcpu-wdg-eb", "aon-apb", 0x4,
908 static SPRD_SC_GATE_CLK(ap_tmr1_eb, "ap-tmr1-eb", "aon-apb", 0x4,
910 static SPRD_SC_GATE_CLK(ap_tmr2_eb, "ap-tmr2-eb", "aon-apb", 0x4,
912 static SPRD_SC_GATE_CLK(disp_emc_eb, "disp-emc-eb", "aon-apb", 0x4,
914 static SPRD_SC_GATE_CLK(zip_emc_eb, "zip-emc-eb", "aon-apb", 0x4,
916 static SPRD_SC_GATE_CLK(gsp_emc_eb, "gsp-emc-eb", "aon-apb", 0x4,
918 static SPRD_SC_GATE_CLK(osc_aon_eb, "osc-aon-eb", "aon-apb", 0x4,
920 static SPRD_SC_GATE_CLK(lvds_trx_eb, "lvds-trx-eb", "aon-apb", 0x4,
922 static SPRD_SC_GATE_CLK(lvds_tcxo_eb, "lvds-tcxo-eb", "aon-apb", 0x4,
924 static SPRD_SC_GATE_CLK(mdar_eb, "mdar-eb", "aon-apb", 0x4,
926 static SPRD_SC_GATE_CLK(rtc4m0_cal_eb, "rtc4m0-cal-eb", "aon-apb", 0x4,
928 static SPRD_SC_GATE_CLK(rct100m_cal_eb, "rct100m-cal-eb", "aon-apb", 0x4,
930 static SPRD_SC_GATE_CLK(djtag_eb, "djtag-eb", "aon-apb", 0x4,
932 static SPRD_SC_GATE_CLK(mbox_eb, "mbox-eb", "aon-apb", 0x4,
934 static SPRD_SC_GATE_CLK(aon_dma_eb, "aon-dma-eb", "aon-apb", 0x4,
936 static SPRD_SC_GATE_CLK(dbg_emc_eb, "dbg-emc-eb", "aon-apb", 0x4,
938 static SPRD_SC_GATE_CLK(lvds_pll_div_en, "lvds-pll-div-en", "aon-apb", 0x4,
940 static SPRD_SC_GATE_CLK(def_eb, "def-eb", "aon-apb", 0x4,
942 static SPRD_SC_GATE_CLK(aon_apb_rsv0, "aon-apb-rsv0", "aon-apb", 0x4,
944 static SPRD_SC_GATE_CLK(orp_jtag_eb, "orp-jtag-eb", "aon-apb", 0x4,
946 static SPRD_SC_GATE_CLK(vsp_eb, "vsp-eb", "aon-apb", 0x4,
948 static SPRD_SC_GATE_CLK(cam_eb, "cam-eb", "aon-apb", 0x4,
950 static SPRD_SC_GATE_CLK(disp_eb, "disp-eb", "aon-apb", 0x4,
952 static SPRD_SC_GATE_CLK(dbg_axi_if_eb, "dbg-axi-if-eb", "aon-apb", 0x4,
954 static SPRD_SC_GATE_CLK(sdio0_2x_en, "sdio0-2x-en", "aon-apb", 0x13c,
956 static SPRD_SC_GATE_CLK(sdio1_2x_en, "sdio1-2x-en", "aon-apb", 0x13c,
958 static SPRD_SC_GATE_CLK(sdio2_2x_en, "sdio2-2x-en", "aon-apb", 0x13c,
960 static SPRD_SC_GATE_CLK(emmc_2x_en, "emmc-2x-en", "aon-apb", 0x13c,
962 static SPRD_SC_GATE_CLK(arch_rtc_eb, "arch-rtc-eb", "aon-apb", 0x10,
964 static SPRD_SC_GATE_CLK(kpb_rtc_eb, "kpb-rtc-eb", "aon-apb", 0x10,
966 static SPRD_SC_GATE_CLK(aon_syst_rtc_eb, "aon-syst-rtc-eb", "aon-apb", 0x10,
968 static SPRD_SC_GATE_CLK(ap_syst_rtc_eb, "ap-syst-rtc-eb", "aon-apb", 0x10,
970 static SPRD_SC_GATE_CLK(aon_tmr_rtc_eb, "aon-tmr-rtc-eb", "aon-apb", 0x10,
972 static SPRD_SC_GATE_CLK(ap_tmr0_rtc_eb, "ap-tmr0-rtc-eb", "aon-apb", 0x10,
974 static SPRD_SC_GATE_CLK(eic_rtc_eb, "eic-rtc-eb", "aon-apb", 0x10,
976 static SPRD_SC_GATE_CLK(eic_rtcdv5_eb, "eic-rtcdv5-eb", "aon-apb", 0x10,
978 static SPRD_SC_GATE_CLK(ap_wdg_rtc_eb, "ap-wdg-rtc-eb", "aon-apb", 0x10,
980 static SPRD_SC_GATE_CLK(ap_tmr1_rtc_eb, "ap-tmr1-rtc-eb", "aon-apb", 0x10,
982 static SPRD_SC_GATE_CLK(ap_tmr2_rtc_eb, "ap-tmr2-rtc-eb", "aon-apb", 0x10,
984 static SPRD_SC_GATE_CLK(dcxo_tmr_rtc_eb, "dcxo-tmr-rtc-eb", "aon-apb", 0x10,
986 static SPRD_SC_GATE_CLK(bb_cal_rtc_eb, "bb-cal-rtc-eb", "aon-apb", 0x10,
988 static SPRD_SC_GATE_CLK(avs_big_rtc_eb, "avs-big-rtc-eb", "aon-apb", 0x10,
990 static SPRD_SC_GATE_CLK(avs_lit_rtc_eb, "avs-lit-rtc-eb", "aon-apb", 0x10,
992 static SPRD_SC_GATE_CLK(avs_gpu0_rtc_eb, "avs-gpu0-rtc-eb", "aon-apb", 0x10,
994 static SPRD_SC_GATE_CLK(avs_gpu1_rtc_eb, "avs-gpu1-rtc-eb", "aon-apb", 0x10,
996 static SPRD_SC_GATE_CLK(gpu_ts_eb, "gpu-ts-eb", "aon-apb", 0x10,
998 static SPRD_SC_GATE_CLK(rtcdv10_eb, "rtcdv10-eb", "aon-apb", 0x10,
1094 [CLK_AVS_LIT_EB] = &avs_lit_eb.common.hw,
1095 [CLK_AVS_BIG_EB] = &avs_big_eb.common.hw,
1096 [CLK_AP_INTC5_EB] = &ap_intc5_eb.common.hw,
1097 [CLK_GPIO_EB] = &gpio_eb.common.hw,
1098 [CLK_PWM0_EB] = &pwm0_eb.common.hw,
1099 [CLK_PWM1_EB] = &pwm1_eb.common.hw,
1100 [CLK_PWM2_EB] = &pwm2_eb.common.hw,
1101 [CLK_PWM3_EB] = &pwm3_eb.common.hw,
1102 [CLK_KPD_EB] = &kpd_eb.common.hw,
1103 [CLK_AON_SYS_EB] = &aon_sys_eb.common.hw,
1104 [CLK_AP_SYS_EB] = &ap_sys_eb.common.hw,
1105 [CLK_AON_TMR_EB] = &aon_tmr_eb.common.hw,
1106 [CLK_AP_TMR0_EB] = &ap_tmr0_eb.common.hw,
1107 [CLK_EFUSE_EB] = &efuse_eb.common.hw,
1108 [CLK_EIC_EB] = &eic_eb.common.hw,
1109 [CLK_PUB1_REG_EB] = &pub1_reg_eb.common.hw,
1110 [CLK_ADI_EB] = &adi_eb.common.hw,
1111 [CLK_AP_INTC0_EB] = &ap_intc0_eb.common.hw,
1112 [CLK_AP_INTC1_EB] = &ap_intc1_eb.common.hw,
1113 [CLK_AP_INTC2_EB] = &ap_intc2_eb.common.hw,
1114 [CLK_AP_INTC3_EB] = &ap_intc3_eb.common.hw,
1115 [CLK_AP_INTC4_EB] = &ap_intc4_eb.common.hw,
1116 [CLK_SPLK_EB] = &splk_eb.common.hw,
1117 [CLK_MSPI_EB] = &mspi_eb.common.hw,
1118 [CLK_PUB0_REG_EB] = &pub0_reg_eb.common.hw,
1119 [CLK_PIN_EB] = &pin_eb.common.hw,
1120 [CLK_AON_CKG_EB] = &aon_ckg_eb.common.hw,
1121 [CLK_GPU_EB] = &gpu_eb.common.hw,
1122 [CLK_APCPU_TS0_EB] = &apcpu_ts0_eb.common.hw,
1123 [CLK_APCPU_TS1_EB] = &apcpu_ts1_eb.common.hw,
1124 [CLK_DAP_EB] = &dap_eb.common.hw,
1125 [CLK_I2C_EB] = &i2c_eb.common.hw,
1126 [CLK_PMU_EB] = &pmu_eb.common.hw,
1127 [CLK_THM_EB] = &thm_eb.common.hw,
1128 [CLK_AUX0_EB] = &aux0_eb.common.hw,
1129 [CLK_AUX1_EB] = &aux1_eb.common.hw,
1130 [CLK_AUX2_EB] = &aux2_eb.common.hw,
1131 [CLK_PROBE_EB] = &probe_eb.common.hw,
1132 [CLK_GPU0_AVS_EB] = &gpu0_avs_eb.common.hw,
1133 [CLK_GPU1_AVS_EB] = &gpu1_avs_eb.common.hw,
1134 [CLK_APCPU_WDG_EB] = &apcpu_wdg_eb.common.hw,
1135 [CLK_AP_TMR1_EB] = &ap_tmr1_eb.common.hw,
1136 [CLK_AP_TMR2_EB] = &ap_tmr2_eb.common.hw,
1137 [CLK_DISP_EMC_EB] = &disp_emc_eb.common.hw,
1138 [CLK_ZIP_EMC_EB] = &zip_emc_eb.common.hw,
1139 [CLK_GSP_EMC_EB] = &gsp_emc_eb.common.hw,
1140 [CLK_OSC_AON_EB] = &osc_aon_eb.common.hw,
1141 [CLK_LVDS_TRX_EB] = &lvds_trx_eb.common.hw,
1142 [CLK_LVDS_TCXO_EB] = &lvds_tcxo_eb.common.hw,
1143 [CLK_MDAR_EB] = &mdar_eb.common.hw,
1144 [CLK_RTC4M0_CAL_EB] = &rtc4m0_cal_eb.common.hw,
1145 [CLK_RCT100M_CAL_EB] = &rct100m_cal_eb.common.hw,
1146 [CLK_DJTAG_EB] = &djtag_eb.common.hw,
1147 [CLK_MBOX_EB] = &mbox_eb.common.hw,
1148 [CLK_AON_DMA_EB] = &aon_dma_eb.common.hw,
1149 [CLK_DBG_EMC_EB] = &dbg_emc_eb.common.hw,
1150 [CLK_LVDS_PLL_DIV_EN] = &lvds_pll_div_en.common.hw,
1151 [CLK_DEF_EB] = &def_eb.common.hw,
1152 [CLK_AON_APB_RSV0] = &aon_apb_rsv0.common.hw,
1153 [CLK_ORP_JTAG_EB] = &orp_jtag_eb.common.hw,
1154 [CLK_VSP_EB] = &vsp_eb.common.hw,
1155 [CLK_CAM_EB] = &cam_eb.common.hw,
1156 [CLK_DISP_EB] = &disp_eb.common.hw,
1157 [CLK_DBG_AXI_IF_EB] = &dbg_axi_if_eb.common.hw,
1158 [CLK_SDIO0_2X_EN] = &sdio0_2x_en.common.hw,
1159 [CLK_SDIO1_2X_EN] = &sdio1_2x_en.common.hw,
1160 [CLK_SDIO2_2X_EN] = &sdio2_2x_en.common.hw,
1161 [CLK_EMMC_2X_EN] = &emmc_2x_en.common.hw,
1162 [CLK_ARCH_RTC_EB] = &arch_rtc_eb.common.hw,
1163 [CLK_KPB_RTC_EB] = &kpb_rtc_eb.common.hw,
1164 [CLK_AON_SYST_RTC_EB] = &aon_syst_rtc_eb.common.hw,
1165 [CLK_AP_SYST_RTC_EB] = &ap_syst_rtc_eb.common.hw,
1166 [CLK_AON_TMR_RTC_EB] = &aon_tmr_rtc_eb.common.hw,
1167 [CLK_AP_TMR0_RTC_EB] = &ap_tmr0_rtc_eb.common.hw,
1168 [CLK_EIC_RTC_EB] = &eic_rtc_eb.common.hw,
1169 [CLK_EIC_RTCDV5_EB] = &eic_rtcdv5_eb.common.hw,
1170 [CLK_AP_WDG_RTC_EB] = &ap_wdg_rtc_eb.common.hw,
1171 [CLK_AP_TMR1_RTC_EB] = &ap_tmr1_rtc_eb.common.hw,
1172 [CLK_AP_TMR2_RTC_EB] = &ap_tmr2_rtc_eb.common.hw,
1173 [CLK_DCXO_TMR_RTC_EB] = &dcxo_tmr_rtc_eb.common.hw,
1174 [CLK_BB_CAL_RTC_EB] = &bb_cal_rtc_eb.common.hw,
1175 [CLK_AVS_BIG_RTC_EB] = &avs_big_rtc_eb.common.hw,
1176 [CLK_AVS_LIT_RTC_EB] = &avs_lit_rtc_eb.common.hw,
1177 [CLK_AVS_GPU0_RTC_EB] = &avs_gpu0_rtc_eb.common.hw,
1178 [CLK_AVS_GPU1_RTC_EB] = &avs_gpu1_rtc_eb.common.hw,
1179 [CLK_GPU_TS_EB] = &gpu_ts_eb.common.hw,
1180 [CLK_RTCDV10_EB] = &rtcdv10_eb.common.hw,
1192 static const char * const lit_mcu_parents[] = { "ext-26m", "twpll-512m",
1193 "twpll-768m", "ltepll0",
1195 static SPRD_COMP_CLK_TABLE(lit_mcu, "lit-mcu", lit_mcu_parents, 0x20,
1198 static const char * const big_mcu_parents[] = { "ext-26m", "twpll-512m",
1199 "twpll-768m", "ltepll0",
1201 static SPRD_COMP_CLK_TABLE(big_mcu, "big-mcu", big_mcu_parents, 0x24,
1212 [CLK_LIT_MCU] = &lit_mcu.common.hw,
1213 [CLK_BIG_MCU] = &big_mcu.common.hw,
1224 static SPRD_SC_GATE_CLK(agcp_iis0_eb, "agcp-iis0-eb", "aon-apb",
1226 static SPRD_SC_GATE_CLK(agcp_iis1_eb, "agcp-iis1-eb", "aon-apb",
1228 static SPRD_SC_GATE_CLK(agcp_iis2_eb, "agcp-iis2-eb", "aon-apb",
1230 static SPRD_SC_GATE_CLK(agcp_iis3_eb, "agcp-iis3-eb", "aon-apb",
1232 static SPRD_SC_GATE_CLK(agcp_uart_eb, "agcp-uart-eb", "aon-apb",
1234 static SPRD_SC_GATE_CLK(agcp_dmacp_eb, "agcp-dmacp-eb", "aon-apb",
1236 static SPRD_SC_GATE_CLK(agcp_dmaap_eb, "agcp-dmaap-eb", "aon-apb",
1238 static SPRD_SC_GATE_CLK(agcp_arc48k_eb, "agcp-arc48k-eb", "aon-apb",
1240 static SPRD_SC_GATE_CLK(agcp_src44p1k_eb, "agcp-src44p1k-eb", "aon-apb",
1242 static SPRD_SC_GATE_CLK(agcp_mcdt_eb, "agcp-mcdt-eb", "aon-apb",
1244 static SPRD_SC_GATE_CLK(agcp_vbcifd_eb, "agcp-vbcifd-eb", "aon-apb",
1246 static SPRD_SC_GATE_CLK(agcp_vbc_eb, "agcp-vbc-eb", "aon-apb",
1248 static SPRD_SC_GATE_CLK(agcp_spinlock_eb, "agcp-spinlock-eb", "aon-apb",
1250 static SPRD_SC_GATE_CLK(agcp_icu_eb, "agcp-icu-eb", "aon-apb",
1252 static SPRD_SC_GATE_CLK(agcp_ap_ashb_eb, "agcp-ap-ashb-eb", "aon-apb",
1254 static SPRD_SC_GATE_CLK(agcp_cp_ashb_eb, "agcp-cp-ashb-eb", "aon-apb",
1256 static SPRD_SC_GATE_CLK(agcp_aud_eb, "agcp-aud-eb", "aon-apb",
1258 static SPRD_SC_GATE_CLK(agcp_audif_eb, "agcp-audif-eb", "aon-apb",
1285 [CLK_AGCP_IIS0_EB] = &agcp_iis0_eb.common.hw,
1286 [CLK_AGCP_IIS1_EB] = &agcp_iis1_eb.common.hw,
1287 [CLK_AGCP_IIS2_EB] = &agcp_iis2_eb.common.hw,
1288 [CLK_AGCP_IIS3_EB] = &agcp_iis3_eb.common.hw,
1289 [CLK_AGCP_UART_EB] = &agcp_uart_eb.common.hw,
1290 [CLK_AGCP_DMACP_EB] = &agcp_dmacp_eb.common.hw,
1291 [CLK_AGCP_DMAAP_EB] = &agcp_dmaap_eb.common.hw,
1292 [CLK_AGCP_ARC48K_EB] = &agcp_arc48k_eb.common.hw,
1293 [CLK_AGCP_SRC44P1K_EB] = &agcp_src44p1k_eb.common.hw,
1294 [CLK_AGCP_MCDT_EB] = &agcp_mcdt_eb.common.hw,
1295 [CLK_AGCP_VBCIFD_EB] = &agcp_vbcifd_eb.common.hw,
1296 [CLK_AGCP_VBC_EB] = &agcp_vbc_eb.common.hw,
1297 [CLK_AGCP_SPINLOCK_EB] = &agcp_spinlock_eb.common.hw,
1298 [CLK_AGCP_ICU_EB] = &agcp_icu_eb.common.hw,
1299 [CLK_AGCP_AP_ASHB_EB] = &agcp_ap_ashb_eb.common.hw,
1300 [CLK_AGCP_CP_ASHB_EB] = &agcp_cp_ashb_eb.common.hw,
1301 [CLK_AGCP_AUD_EB] = &agcp_aud_eb.common.hw,
1302 [CLK_AGCP_AUDIF_EB] = &agcp_audif_eb.common.hw,
1313 static const char * const gpu_parents[] = { "twpll-512m",
1314 "twpll-768m",
1326 [CLK_GPU] = &gpu_clk.common.hw,
1337 static const char * const ahb_parents[] = { "ext-26m", "twpll-96m",
1338 "twpll-128m", "twpll-153m6" };
1339 static SPRD_MUX_CLK(ahb_vsp, "ahb-vsp", ahb_parents, 0x20,
1342 static const char * const vsp_parents[] = { "twpll-76m8", "twpll-128m",
1343 "twpll-256m", "twpll-307m2",
1344 "twpll-384m" };
1347 static const char * const dispc_parents[] = { "twpll-76m8", "twpll-128m",
1348 "twpll-256m", "twpll-307m2" };
1349 static SPRD_COMP_CLK(vsp_enc, "vsp-enc", dispc_parents, 0x28, 0, 2, 8, 2, 0);
1351 static const char * const vpp_parents[] = { "twpll-96m", "twpll-153m6",
1352 "twpll-192m", "twpll-256m" };
1355 static const char * const vsp_26m_parents[] = { "ext-26m" };
1356 static SPRD_MUX_CLK(vsp_26m, "vsp-26m", vsp_26m_parents, 0x30,
1370 [CLK_AHB_VSP] = &ahb_vsp.common.hw,
1371 [CLK_VSP] = &vsp_clk.common.hw,
1372 [CLK_VSP_ENC] = &vsp_enc.common.hw,
1373 [CLK_VPP] = &vpp_clk.common.hw,
1374 [CLK_VSP_26M] = &vsp_26m.common.hw,
1385 static SPRD_SC_GATE_CLK(vsp_dec_eb, "vsp-dec-eb", "ahb-vsp", 0x0,
1387 static SPRD_SC_GATE_CLK(vsp_ckg_eb, "vsp-ckg-eb", "ahb-vsp", 0x0,
1389 static SPRD_SC_GATE_CLK(vsp_mmu_eb, "vsp-mmu-eb", "ahb-vsp", 0x0,
1391 static SPRD_SC_GATE_CLK(vsp_enc_eb, "vsp-enc-eb", "ahb-vsp", 0x0,
1393 static SPRD_SC_GATE_CLK(vpp_eb, "vpp-eb", "ahb-vsp", 0x0,
1395 static SPRD_SC_GATE_CLK(vsp_26m_eb, "vsp-26m-eb", "ahb-vsp", 0x0,
1397 static SPRD_GATE_CLK(vsp_axi_gate, "vsp-axi-gate", "ahb-vsp", 0x8,
1399 static SPRD_GATE_CLK(vsp_enc_gate, "vsp-enc-gate", "ahb-vsp", 0x8,
1401 static SPRD_GATE_CLK(vpp_axi_gate, "vpp-axi-gate", "ahb-vsp", 0x8,
1403 static SPRD_GATE_CLK(vsp_bm_gate, "vsp-bm-gate", "ahb-vsp", 0x8,
1405 static SPRD_GATE_CLK(vsp_enc_bm_gate, "vsp-enc-bm-gate", "ahb-vsp", 0x8,
1407 static SPRD_GATE_CLK(vpp_bm_gate, "vpp-bm-gate", "ahb-vsp", 0x8,
1428 [CLK_VSP_DEC_EB] = &vsp_dec_eb.common.hw,
1429 [CLK_VSP_CKG_EB] = &vsp_ckg_eb.common.hw,
1430 [CLK_VSP_MMU_EB] = &vsp_mmu_eb.common.hw,
1431 [CLK_VSP_ENC_EB] = &vsp_enc_eb.common.hw,
1432 [CLK_VPP_EB] = &vpp_eb.common.hw,
1433 [CLK_VSP_26M_EB] = &vsp_26m_eb.common.hw,
1434 [CLK_VSP_AXI_GATE] = &vsp_axi_gate.common.hw,
1435 [CLK_VSP_ENC_GATE] = &vsp_enc_gate.common.hw,
1436 [CLK_VPP_AXI_GATE] = &vpp_axi_gate.common.hw,
1437 [CLK_VSP_BM_GATE] = &vsp_bm_gate.common.hw,
1438 [CLK_VSP_ENC_BM_GATE] = &vsp_enc_bm_gate.common.hw,
1439 [CLK_VPP_BM_GATE] = &vpp_bm_gate.common.hw,
1450 static SPRD_MUX_CLK(ahb_cam, "ahb-cam", ahb_parents, 0x20,
1452 static const char * const sensor_parents[] = { "ext-26m", "twpll-48m",
1453 "twpll-76m8", "twpll-96m" };
1460 static SPRD_GATE_CLK(mipi_csi0_eb, "mipi-csi0-eb", "ahb-cam", 0x4c,
1462 static SPRD_GATE_CLK(mipi_csi1_eb, "mipi-csi1-eb", "ahb-cam", 0x50,
1477 [CLK_AHB_CAM] = &ahb_cam.common.hw,
1478 [CLK_SENSOR0] = &sensor0_clk.common.hw,
1479 [CLK_SENSOR1] = &sensor1_clk.common.hw,
1480 [CLK_SENSOR2] = &sensor2_clk.common.hw,
1481 [CLK_MIPI_CSI0_EB] = &mipi_csi0_eb.common.hw,
1482 [CLK_MIPI_CSI1_EB] = &mipi_csi1_eb.common.hw,
1493 static SPRD_SC_GATE_CLK(dcam0_eb, "dcam0-eb", "ahb-cam", 0x0,
1495 static SPRD_SC_GATE_CLK(dcam1_eb, "dcam1-eb", "ahb-cam", 0x0,
1497 static SPRD_SC_GATE_CLK(isp0_eb, "isp0-eb", "ahb-cam", 0x0,
1499 static SPRD_SC_GATE_CLK(csi0_eb, "csi0-eb", "ahb-cam", 0x0,
1501 static SPRD_SC_GATE_CLK(csi1_eb, "csi1-eb", "ahb-cam", 0x0,
1503 static SPRD_SC_GATE_CLK(jpg0_eb, "jpg0-eb", "ahb-cam", 0x0,
1505 static SPRD_SC_GATE_CLK(jpg1_eb, "jpg1-eb", "ahb-cam", 0x0,
1507 static SPRD_SC_GATE_CLK(cam_ckg_eb, "cam-ckg-eb", "ahb-cam", 0x0,
1509 static SPRD_SC_GATE_CLK(cam_mmu_eb, "cam-mmu-eb", "ahb-cam", 0x0,
1511 static SPRD_SC_GATE_CLK(isp1_eb, "isp1-eb", "ahb-cam", 0x0,
1513 static SPRD_SC_GATE_CLK(cpp_eb, "cpp-eb", "ahb-cam", 0x0,
1515 static SPRD_SC_GATE_CLK(mmu_pf_eb, "mmu-pf-eb", "ahb-cam", 0x0,
1517 static SPRD_SC_GATE_CLK(isp2_eb, "isp2-eb", "ahb-cam", 0x0,
1519 static SPRD_SC_GATE_CLK(dcam2isp_if_eb, "dcam2isp-if-eb", "ahb-cam", 0x0,
1521 static SPRD_SC_GATE_CLK(isp2dcam_if_eb, "isp2dcam-if-eb", "ahb-cam", 0x0,
1523 static SPRD_SC_GATE_CLK(isp_lclk_eb, "isp-lclk-eb", "ahb-cam", 0x0,
1525 static SPRD_SC_GATE_CLK(isp_iclk_eb, "isp-iclk-eb", "ahb-cam", 0x0,
1527 static SPRD_SC_GATE_CLK(isp_mclk_eb, "isp-mclk-eb", "ahb-cam", 0x0,
1529 static SPRD_SC_GATE_CLK(isp_pclk_eb, "isp-pclk-eb", "ahb-cam", 0x0,
1531 static SPRD_SC_GATE_CLK(isp_isp2dcam_eb, "isp-isp2dcam-eb", "ahb-cam", 0x0,
1533 static SPRD_SC_GATE_CLK(dcam0_if_eb, "dcam0-if-eb", "ahb-cam", 0x0,
1535 static SPRD_SC_GATE_CLK(clk26m_if_eb, "clk26m-if-eb", "ahb-cam", 0x0,
1537 static SPRD_GATE_CLK(cphy0_gate, "cphy0-gate", "ahb-cam", 0x8,
1539 static SPRD_GATE_CLK(mipi_csi0_gate, "mipi-csi0-gate", "ahb-cam", 0x8,
1541 static SPRD_GATE_CLK(cphy1_gate, "cphy1-gate", "ahb-cam", 0x8,
1543 static SPRD_GATE_CLK(mipi_csi1, "mipi-csi1", "ahb-cam", 0x8,
1545 static SPRD_GATE_CLK(dcam0_axi_gate, "dcam0-axi-gate", "ahb-cam", 0x8,
1547 static SPRD_GATE_CLK(dcam1_axi_gate, "dcam1-axi-gate", "ahb-cam", 0x8,
1549 static SPRD_GATE_CLK(sensor0_gate, "sensor0-gate", "ahb-cam", 0x8,
1551 static SPRD_GATE_CLK(sensor1_gate, "sensor1-gate", "ahb-cam", 0x8,
1553 static SPRD_GATE_CLK(jpg0_axi_gate, "jpg0-axi-gate", "ahb-cam", 0x8,
1555 static SPRD_GATE_CLK(gpg1_axi_gate, "gpg1-axi-gate", "ahb-cam", 0x8,
1557 static SPRD_GATE_CLK(isp0_axi_gate, "isp0-axi-gate", "ahb-cam", 0x8,
1559 static SPRD_GATE_CLK(isp1_axi_gate, "isp1-axi-gate", "ahb-cam", 0x8,
1561 static SPRD_GATE_CLK(isp2_axi_gate, "isp2-axi-gate", "ahb-cam", 0x8,
1563 static SPRD_GATE_CLK(cpp_axi_gate, "cpp-axi-gate", "ahb-cam", 0x8,
1565 static SPRD_GATE_CLK(d0_if_axi_gate, "d0-if-axi-gate", "ahb-cam", 0x8,
1567 static SPRD_GATE_CLK(d2i_if_axi_gate, "d2i-if-axi-gate", "ahb-cam", 0x8,
1569 static SPRD_GATE_CLK(i2d_if_axi_gate, "i2d-if-axi-gate", "ahb-cam", 0x8,
1571 static SPRD_GATE_CLK(spare_axi_gate, "spare-axi-gate", "ahb-cam", 0x8,
1573 static SPRD_GATE_CLK(sensor2_gate, "sensor2-gate", "ahb-cam", 0x8,
1575 static SPRD_SC_GATE_CLK(d0if_in_d_en, "d0if-in-d-en", "ahb-cam", 0x28,
1577 static SPRD_SC_GATE_CLK(d1if_in_d_en, "d1if-in-d-en", "ahb-cam", 0x28,
1579 static SPRD_SC_GATE_CLK(d0if_in_d2i_en, "d0if-in-d2i-en", "ahb-cam", 0x28,
1581 static SPRD_SC_GATE_CLK(d1if_in_d2i_en, "d1if-in-d2i-en", "ahb-cam", 0x28,
1583 static SPRD_SC_GATE_CLK(ia_in_d2i_en, "ia-in-d2i-en", "ahb-cam", 0x28,
1585 static SPRD_SC_GATE_CLK(ib_in_d2i_en, "ib-in-d2i-en", "ahb-cam", 0x28,
1587 static SPRD_SC_GATE_CLK(ic_in_d2i_en, "ic-in-d2i-en", "ahb-cam", 0x28,
1589 static SPRD_SC_GATE_CLK(ia_in_i_en, "ia-in-i-en", "ahb-cam", 0x28,
1591 static SPRD_SC_GATE_CLK(ib_in_i_en, "ib-in-i-en", "ahb-cam", 0x28,
1593 static SPRD_SC_GATE_CLK(ic_in_i_en, "ic-in-i-en", "ahb-cam", 0x28,
1653 [CLK_DCAM0_EB] = &dcam0_eb.common.hw,
1654 [CLK_DCAM1_EB] = &dcam1_eb.common.hw,
1655 [CLK_ISP0_EB] = &isp0_eb.common.hw,
1656 [CLK_CSI0_EB] = &csi0_eb.common.hw,
1657 [CLK_CSI1_EB] = &csi1_eb.common.hw,
1658 [CLK_JPG0_EB] = &jpg0_eb.common.hw,
1659 [CLK_JPG1_EB] = &jpg1_eb.common.hw,
1660 [CLK_CAM_CKG_EB] = &cam_ckg_eb.common.hw,
1661 [CLK_CAM_MMU_EB] = &cam_mmu_eb.common.hw,
1662 [CLK_ISP1_EB] = &isp1_eb.common.hw,
1663 [CLK_CPP_EB] = &cpp_eb.common.hw,
1664 [CLK_MMU_PF_EB] = &mmu_pf_eb.common.hw,
1665 [CLK_ISP2_EB] = &isp2_eb.common.hw,
1666 [CLK_DCAM2ISP_IF_EB] = &dcam2isp_if_eb.common.hw,
1667 [CLK_ISP2DCAM_IF_EB] = &isp2dcam_if_eb.common.hw,
1668 [CLK_ISP_LCLK_EB] = &isp_lclk_eb.common.hw,
1669 [CLK_ISP_ICLK_EB] = &isp_iclk_eb.common.hw,
1670 [CLK_ISP_MCLK_EB] = &isp_mclk_eb.common.hw,
1671 [CLK_ISP_PCLK_EB] = &isp_pclk_eb.common.hw,
1672 [CLK_ISP_ISP2DCAM_EB] = &isp_isp2dcam_eb.common.hw,
1673 [CLK_DCAM0_IF_EB] = &dcam0_if_eb.common.hw,
1674 [CLK_CLK26M_IF_EB] = &clk26m_if_eb.common.hw,
1675 [CLK_CPHY0_GATE] = &cphy0_gate.common.hw,
1676 [CLK_MIPI_CSI0_GATE] = &mipi_csi0_gate.common.hw,
1677 [CLK_CPHY1_GATE] = &cphy1_gate.common.hw,
1678 [CLK_MIPI_CSI1] = &mipi_csi1.common.hw,
1679 [CLK_DCAM0_AXI_GATE] = &dcam0_axi_gate.common.hw,
1680 [CLK_DCAM1_AXI_GATE] = &dcam1_axi_gate.common.hw,
1681 [CLK_SENSOR0_GATE] = &sensor0_gate.common.hw,
1682 [CLK_SENSOR1_GATE] = &sensor1_gate.common.hw,
1683 [CLK_JPG0_AXI_GATE] = &jpg0_axi_gate.common.hw,
1684 [CLK_GPG1_AXI_GATE] = &gpg1_axi_gate.common.hw,
1685 [CLK_ISP0_AXI_GATE] = &isp0_axi_gate.common.hw,
1686 [CLK_ISP1_AXI_GATE] = &isp1_axi_gate.common.hw,
1687 [CLK_ISP2_AXI_GATE] = &isp2_axi_gate.common.hw,
1688 [CLK_CPP_AXI_GATE] = &cpp_axi_gate.common.hw,
1689 [CLK_D0_IF_AXI_GATE] = &d0_if_axi_gate.common.hw,
1690 [CLK_D2I_IF_AXI_GATE] = &d2i_if_axi_gate.common.hw,
1691 [CLK_I2D_IF_AXI_GATE] = &i2d_if_axi_gate.common.hw,
1692 [CLK_SPARE_AXI_GATE] = &spare_axi_gate.common.hw,
1693 [CLK_SENSOR2_GATE] = &sensor2_gate.common.hw,
1694 [CLK_D0IF_IN_D_EN] = &d0if_in_d_en.common.hw,
1695 [CLK_D1IF_IN_D_EN] = &d1if_in_d_en.common.hw,
1696 [CLK_D0IF_IN_D2I_EN] = &d0if_in_d2i_en.common.hw,
1697 [CLK_D1IF_IN_D2I_EN] = &d1if_in_d2i_en.common.hw,
1698 [CLK_IA_IN_D2I_EN] = &ia_in_d2i_en.common.hw,
1699 [CLK_IB_IN_D2I_EN] = &ib_in_d2i_en.common.hw,
1700 [CLK_IC_IN_D2I_EN] = &ic_in_d2i_en.common.hw,
1701 [CLK_IA_IN_I_EN] = &ia_in_i_en.common.hw,
1702 [CLK_IB_IN_I_EN] = &ib_in_i_en.common.hw,
1703 [CLK_IC_IN_I_EN] = &ic_in_i_en.common.hw,
1714 static SPRD_MUX_CLK(ahb_disp, "ahb-disp", ahb_parents, 0x20,
1716 static SPRD_COMP_CLK(dispc0_dpi, "dispc0-dpi", dispc_parents, 0x34,
1718 static SPRD_COMP_CLK(dispc1_dpi, "dispc1-dpi", dispc_parents, 0x40,
1730 [CLK_AHB_DISP] = &ahb_disp.common.hw,
1731 [CLK_DISPC0_DPI] = &dispc0_dpi.common.hw,
1732 [CLK_DISPC1_DPI] = &dispc1_dpi.common.hw,
1743 static SPRD_SC_GATE_CLK(dispc0_eb, "dispc0-eb", "ahb-disp", 0x0,
1745 static SPRD_SC_GATE_CLK(dispc1_eb, "dispc1-eb", "ahb-disp", 0x0,
1747 static SPRD_SC_GATE_CLK(dispc_mmu_eb, "dispc-mmu-eb", "ahb-disp", 0x0,
1749 static SPRD_SC_GATE_CLK(gsp0_eb, "gsp0-eb", "ahb-disp", 0x0,
1751 static SPRD_SC_GATE_CLK(gsp1_eb, "gsp1-eb", "ahb-disp", 0x0,
1753 static SPRD_SC_GATE_CLK(gsp0_mmu_eb, "gsp0-mmu-eb", "ahb-disp", 0x0,
1755 static SPRD_SC_GATE_CLK(gsp1_mmu_eb, "gsp1-mmu-eb", "ahb-disp", 0x0,
1757 static SPRD_SC_GATE_CLK(dsi0_eb, "dsi0-eb", "ahb-disp", 0x0,
1759 static SPRD_SC_GATE_CLK(dsi1_eb, "dsi1-eb", "ahb-disp", 0x0,
1761 static SPRD_SC_GATE_CLK(disp_ckg_eb, "disp-ckg-eb", "ahb-disp", 0x0,
1763 static SPRD_SC_GATE_CLK(disp_gpu_eb, "disp-gpu-eb", "ahb-disp", 0x0,
1765 static SPRD_SC_GATE_CLK(gpu_mtx_eb, "gpu-mtx-eb", "ahb-disp", 0x0,
1767 static SPRD_SC_GATE_CLK(gsp_mtx_eb, "gsp-mtx-eb", "ahb-disp", 0x0,
1769 static SPRD_SC_GATE_CLK(tmc_mtx_eb, "tmc-mtx-eb", "ahb-disp", 0x0,
1771 static SPRD_SC_GATE_CLK(dispc_mtx_eb, "dispc-mtx-eb", "ahb-disp", 0x0,
1773 static SPRD_GATE_CLK(dphy0_gate, "dphy0-gate", "ahb-disp", 0x8,
1775 static SPRD_GATE_CLK(dphy1_gate, "dphy1-gate", "ahb-disp", 0x8,
1777 static SPRD_GATE_CLK(gsp0_a_gate, "gsp0-a-gate", "ahb-disp", 0x8,
1779 static SPRD_GATE_CLK(gsp1_a_gate, "gsp1-a-gate", "ahb-disp", 0x8,
1781 static SPRD_GATE_CLK(gsp0_f_gate, "gsp0-f-gate", "ahb-disp", 0x8,
1783 static SPRD_GATE_CLK(gsp1_f_gate, "gsp1-f-gate", "ahb-disp", 0x8,
1785 static SPRD_GATE_CLK(d_mtx_f_gate, "d-mtx-f-gate", "ahb-disp", 0x8,
1787 static SPRD_GATE_CLK(d_mtx_a_gate, "d-mtx-a-gate", "ahb-disp", 0x8,
1789 static SPRD_GATE_CLK(d_noc_f_gate, "d-noc-f-gate", "ahb-disp", 0x8,
1791 static SPRD_GATE_CLK(d_noc_a_gate, "d-noc-a-gate", "ahb-disp", 0x8,
1793 static SPRD_GATE_CLK(gsp_mtx_f_gate, "gsp-mtx-f-gate", "ahb-disp", 0x8,
1795 static SPRD_GATE_CLK(gsp_mtx_a_gate, "gsp-mtx-a-gate", "ahb-disp", 0x8,
1797 static SPRD_GATE_CLK(gsp_noc_f_gate, "gsp-noc-f-gate", "ahb-disp", 0x8,
1799 static SPRD_GATE_CLK(gsp_noc_a_gate, "gsp-noc-a-gate", "ahb-disp", 0x8,
1801 static SPRD_GATE_CLK(dispm0idle_gate, "dispm0idle-gate", "ahb-disp", 0x8,
1803 static SPRD_GATE_CLK(gspm0idle_gate, "gspm0idle-gate", "ahb-disp", 0x8,
1843 [CLK_DISPC0_EB] = &dispc0_eb.common.hw,
1844 [CLK_DISPC1_EB] = &dispc1_eb.common.hw,
1845 [CLK_DISPC_MMU_EB] = &dispc_mmu_eb.common.hw,
1846 [CLK_GSP0_EB] = &gsp0_eb.common.hw,
1847 [CLK_GSP1_EB] = &gsp1_eb.common.hw,
1848 [CLK_GSP0_MMU_EB] = &gsp0_mmu_eb.common.hw,
1849 [CLK_GSP1_MMU_EB] = &gsp1_mmu_eb.common.hw,
1850 [CLK_DSI0_EB] = &dsi0_eb.common.hw,
1851 [CLK_DSI1_EB] = &dsi1_eb.common.hw,
1852 [CLK_DISP_CKG_EB] = &disp_ckg_eb.common.hw,
1853 [CLK_DISP_GPU_EB] = &disp_gpu_eb.common.hw,
1854 [CLK_GPU_MTX_EB] = &gpu_mtx_eb.common.hw,
1855 [CLK_GSP_MTX_EB] = &gsp_mtx_eb.common.hw,
1856 [CLK_TMC_MTX_EB] = &tmc_mtx_eb.common.hw,
1857 [CLK_DISPC_MTX_EB] = &dispc_mtx_eb.common.hw,
1858 [CLK_DPHY0_GATE] = &dphy0_gate.common.hw,
1859 [CLK_DPHY1_GATE] = &dphy1_gate.common.hw,
1860 [CLK_GSP0_A_GATE] = &gsp0_a_gate.common.hw,
1861 [CLK_GSP1_A_GATE] = &gsp1_a_gate.common.hw,
1862 [CLK_GSP0_F_GATE] = &gsp0_f_gate.common.hw,
1863 [CLK_GSP1_F_GATE] = &gsp1_f_gate.common.hw,
1864 [CLK_D_MTX_F_GATE] = &d_mtx_f_gate.common.hw,
1865 [CLK_D_MTX_A_GATE] = &d_mtx_a_gate.common.hw,
1866 [CLK_D_NOC_F_GATE] = &d_noc_f_gate.common.hw,
1867 [CLK_D_NOC_A_GATE] = &d_noc_a_gate.common.hw,
1868 [CLK_GSP_MTX_F_GATE] = &gsp_mtx_f_gate.common.hw,
1869 [CLK_GSP_MTX_A_GATE] = &gsp_mtx_a_gate.common.hw,
1870 [CLK_GSP_NOC_F_GATE] = &gsp_noc_f_gate.common.hw,
1871 [CLK_GSP_NOC_A_GATE] = &gsp_noc_a_gate.common.hw,
1872 [CLK_DISPM0IDLE_GATE] = &dispm0idle_gate.common.hw,
1873 [CLK_GSPM0IDLE_GATE] = &gspm0idle_gate.common.hw,
1884 static SPRD_SC_GATE_CLK(sim0_eb, "sim0-eb", "ap-apb", 0x0,
1886 static SPRD_SC_GATE_CLK(iis0_eb, "iis0-eb", "ap-apb", 0x0,
1888 static SPRD_SC_GATE_CLK(iis1_eb, "iis1-eb", "ap-apb", 0x0,
1890 static SPRD_SC_GATE_CLK(iis2_eb, "iis2-eb", "ap-apb", 0x0,
1892 static SPRD_SC_GATE_CLK(iis3_eb, "iis3-eb", "ap-apb", 0x0,
1894 static SPRD_SC_GATE_CLK(spi0_eb, "spi0-eb", "ap-apb", 0x0,
1896 static SPRD_SC_GATE_CLK(spi1_eb, "spi1-eb", "ap-apb", 0x0,
1898 static SPRD_SC_GATE_CLK(spi2_eb, "spi2-eb", "ap-apb", 0x0,
1900 static SPRD_SC_GATE_CLK(i2c0_eb, "i2c0-eb", "ap-apb", 0x0,
1902 static SPRD_SC_GATE_CLK(i2c1_eb, "i2c1-eb", "ap-apb", 0x0,
1904 static SPRD_SC_GATE_CLK(i2c2_eb, "i2c2-eb", "ap-apb", 0x0,
1906 static SPRD_SC_GATE_CLK(i2c3_eb, "i2c3-eb", "ap-apb", 0x0,
1908 static SPRD_SC_GATE_CLK(i2c4_eb, "i2c4-eb", "ap-apb", 0x0,
1910 static SPRD_SC_GATE_CLK(i2c5_eb, "i2c5-eb", "ap-apb", 0x0,
1912 static SPRD_SC_GATE_CLK(uart0_eb, "uart0-eb", "ap-apb", 0x0,
1914 static SPRD_SC_GATE_CLK(uart1_eb, "uart1-eb", "ap-apb", 0x0,
1916 static SPRD_SC_GATE_CLK(uart2_eb, "uart2-eb", "ap-apb", 0x0,
1918 static SPRD_SC_GATE_CLK(uart3_eb, "uart3-eb", "ap-apb", 0x0,
1920 static SPRD_SC_GATE_CLK(uart4_eb, "uart4-eb", "ap-apb", 0x0,
1922 static SPRD_SC_GATE_CLK(ap_ckg_eb, "ap-ckg-eb", "ap-apb", 0x0,
1924 static SPRD_SC_GATE_CLK(spi3_eb, "spi3-eb", "ap-apb", 0x0,
1954 [CLK_SIM0_EB] = &sim0_eb.common.hw,
1955 [CLK_IIS0_EB] = &iis0_eb.common.hw,
1956 [CLK_IIS1_EB] = &iis1_eb.common.hw,
1957 [CLK_IIS2_EB] = &iis2_eb.common.hw,
1958 [CLK_IIS3_EB] = &iis3_eb.common.hw,
1959 [CLK_SPI0_EB] = &spi0_eb.common.hw,
1960 [CLK_SPI1_EB] = &spi1_eb.common.hw,
1961 [CLK_SPI2_EB] = &spi2_eb.common.hw,
1962 [CLK_I2C0_EB] = &i2c0_eb.common.hw,
1963 [CLK_I2C1_EB] = &i2c1_eb.common.hw,
1964 [CLK_I2C2_EB] = &i2c2_eb.common.hw,
1965 [CLK_I2C3_EB] = &i2c3_eb.common.hw,
1966 [CLK_I2C4_EB] = &i2c4_eb.common.hw,
1967 [CLK_I2C5_EB] = &i2c5_eb.common.hw,
1968 [CLK_UART0_EB] = &uart0_eb.common.hw,
1969 [CLK_UART1_EB] = &uart1_eb.common.hw,
1970 [CLK_UART2_EB] = &uart2_eb.common.hw,
1971 [CLK_UART3_EB] = &uart3_eb.common.hw,
1972 [CLK_UART4_EB] = &uart4_eb.common.hw,
1973 [CLK_AP_CKG_EB] = &ap_ckg_eb.common.hw,
1974 [CLK_SPI3_EB] = &spi3_eb.common.hw,
1986 { .compatible = "sprd,sc9860-pmu-gate", /* 0x402b */
1988 { .compatible = "sprd,sc9860-pll", /* 0x4040 */
1990 { .compatible = "sprd,sc9860-ap-clk", /* 0x2000 */
1992 { .compatible = "sprd,sc9860-aon-prediv", /* 0x402d */
1994 { .compatible = "sprd,sc9860-apahb-gate", /* 0x2021 */
1996 { .compatible = "sprd,sc9860-aon-gate", /* 0x402e */
1998 { .compatible = "sprd,sc9860-aonsecure-clk", /* 0x4088 */
2000 { .compatible = "sprd,sc9860-agcp-gate", /* 0x415e */
2002 { .compatible = "sprd,sc9860-gpu-clk", /* 0x6020 */
2004 { .compatible = "sprd,sc9860-vsp-clk", /* 0x6100 */
2006 { .compatible = "sprd,sc9860-vsp-gate", /* 0x6110 */
2008 { .compatible = "sprd,sc9860-cam-clk", /* 0x6200 */
2010 { .compatible = "sprd,sc9860-cam-gate", /* 0x6210 */
2012 { .compatible = "sprd,sc9860-disp-clk", /* 0x6300 */
2014 { .compatible = "sprd,sc9860-disp-gate", /* 0x6310 */
2016 { .compatible = "sprd,sc9860-apapb-gate", /* 0x70b0 */
2028 match = of_match_node(sprd_sc9860_clk_ids, pdev->dev.of_node); in sc9860_clk_probe()
2031 return -ENODEV; in sc9860_clk_probe()
2034 desc = match->data; in sc9860_clk_probe()
2039 return sprd_clk_probe(&pdev->dev, desc->hw_clks); in sc9860_clk_probe()
2045 .name = "sc9860-clk",
2053 MODULE_ALIAS("platform:sc9860-clk");