50 #define PERIP1_CLK_ENB			(misc_base + 0x02C)  macro
400 			PERIP1_CLK_ENB, RTC_CLK_ENB, 0, &_lock);  in spear3xx_clk_init()
448 			CLK_SET_RATE_PARENT, PERIP1_CLK_ENB, UART_CLK_ENB, 0,  in spear3xx_clk_init()
466 			CLK_SET_RATE_PARENT, PERIP1_CLK_ENB, FIRDA_CLK_ENB, 0,  in spear3xx_clk_init()
487 			CLK_SET_RATE_PARENT, PERIP1_CLK_ENB, GPT1_CLK_ENB, 0,  in spear3xx_clk_init()
499 			CLK_SET_RATE_PARENT, PERIP1_CLK_ENB, GPT2_CLK_ENB, 0,  in spear3xx_clk_init()
535 	clk = clk_register_gate(NULL, "usbh_clk", "pll3_clk", 0, PERIP1_CLK_ENB,  in spear3xx_clk_init()
549 	clk = clk_register_gate(NULL, "usbd_clk", "pll3_clk", 0, PERIP1_CLK_ENB,  in spear3xx_clk_init()
572 	clk = clk_register_gate(NULL, "c3_clk", "ahb_clk", 0, PERIP1_CLK_ENB,  in spear3xx_clk_init()
576 	clk = clk_register_gate(NULL, "dma_clk", "ahb_clk", 0, PERIP1_CLK_ENB,  in spear3xx_clk_init()
580 	clk = clk_register_gate(NULL, "gmac_clk", "ahb_clk", 0, PERIP1_CLK_ENB,  in spear3xx_clk_init()
584 	clk = clk_register_gate(NULL, "i2c0_clk", "ahb_clk", 0, PERIP1_CLK_ENB,  in spear3xx_clk_init()
588 	clk = clk_register_gate(NULL, "jpeg_clk", "ahb_clk", 0, PERIP1_CLK_ENB,  in spear3xx_clk_init()
592 	clk = clk_register_gate(NULL, "smi_clk", "ahb_clk", 0, PERIP1_CLK_ENB,  in spear3xx_clk_init()
597 	clk = clk_register_gate(NULL, "adc_clk", "apb_clk", 0, PERIP1_CLK_ENB,  in spear3xx_clk_init()
601 	clk = clk_register_gate(NULL, "gpio0_clk", "apb_clk", 0, PERIP1_CLK_ENB,  in spear3xx_clk_init()
605 	clk = clk_register_gate(NULL, "ssp0_clk", "apb_clk", 0, PERIP1_CLK_ENB,  in spear3xx_clk_init()