Lines Matching refs:CV1800_GATE

199 static CV1800_GATE(clk_tpu_fab, clk_mipimpll_parents,
237 static CV1800_GATE(clk_xtal_misc, osc_parents,
262 static CV1800_GATE(clk_pm, clk_axi6_bus_parents,
265 static CV1800_GATE(clk_timer0, clk_timer_parents,
268 static CV1800_GATE(clk_timer1, clk_timer_parents,
271 static CV1800_GATE(clk_timer2, clk_timer_parents,
274 static CV1800_GATE(clk_timer3, clk_timer_parents,
277 static CV1800_GATE(clk_timer4, clk_timer_parents,
280 static CV1800_GATE(clk_timer5, clk_timer_parents,
283 static CV1800_GATE(clk_timer6, clk_timer_parents,
286 static CV1800_GATE(clk_timer7, clk_timer_parents,
298 static CV1800_GATE(clk_ahb_rom, clk_axi4_bus_parents,
303 static CV1800_GATE(clk_rtc_25m, osc_parents,
313 static CV1800_GATE(clk_tempsen, osc_parents,
318 static CV1800_GATE(clk_saradc, osc_parents,
323 static CV1800_GATE(clk_efuse, osc_parents,
326 static CV1800_GATE(clk_apb_efuse, osc_parents,
331 static CV1800_GATE(clk_apb_wdt, osc_parents,
336 static CV1800_GATE(clk_wgn, osc_parents,
339 static CV1800_GATE(clk_wgn0, osc_parents,
342 static CV1800_GATE(clk_wgn1, osc_parents,
345 static CV1800_GATE(clk_wgn2, osc_parents,
350 static CV1800_GATE(clk_keyscan, osc_parents,
355 static CV1800_GATE(clk_axi4_emmc, clk_axi4_bus_parents,
370 static CV1800_GATE(clk_axi4_sd0, clk_axi4_bus_parents,
383 static CV1800_GATE(clk_axi4_sd1, clk_axi4_bus_parents,
410 static CV1800_GATE(clk_apb_gpio, clk_axi6_bus_parents,
413 static CV1800_GATE(clk_apb_gpio_intr, clk_axi6_bus_parents,
423 static CV1800_GATE(clk_axi4_eth0, clk_axi4_bus_parents,
431 static CV1800_GATE(clk_axi4_eth1, clk_axi4_bus_parents,
436 static CV1800_GATE(clk_ahb_sf, clk_axi4_bus_parents,
439 static CV1800_GATE(clk_ahb_sf1, clk_axi4_bus_parents,
466 static CV1800_GATE(clk_apb_audsrc, clk_axi4_bus_parents,
471 static CV1800_GATE(clk_sdma_axi, clk_axi4_bus_parents,
500 static CV1800_GATE(clk_apb_spi0, clk_axi4_bus_parents,
503 static CV1800_GATE(clk_apb_spi1, clk_axi4_bus_parents,
506 static CV1800_GATE(clk_apb_spi2, clk_axi4_bus_parents,
509 static CV1800_GATE(clk_apb_spi3, clk_axi4_bus_parents,
519 static CV1800_GATE(clk_uart0, clk_uart_parents,
522 static CV1800_GATE(clk_apb_uart0, clk_axi4_bus_parents,
525 static CV1800_GATE(clk_uart1, clk_uart_parents,
528 static CV1800_GATE(clk_apb_uart1, clk_axi4_bus_parents,
531 static CV1800_GATE(clk_uart2, clk_uart_parents,
534 static CV1800_GATE(clk_apb_uart2, clk_axi4_bus_parents,
537 static CV1800_GATE(clk_uart3, clk_uart_parents,
540 static CV1800_GATE(clk_apb_uart3, clk_axi4_bus_parents,
543 static CV1800_GATE(clk_uart4, clk_uart_parents,
546 static CV1800_GATE(clk_apb_uart4, clk_axi4_bus_parents,
551 static CV1800_GATE(clk_apb_i2s0, clk_axi4_bus_parents,
554 static CV1800_GATE(clk_apb_i2s1, clk_axi4_bus_parents,
557 static CV1800_GATE(clk_apb_i2s2, clk_axi4_bus_parents,
560 static CV1800_GATE(clk_apb_i2s3, clk_axi4_bus_parents,
565 static CV1800_GATE(clk_debug, osc_parents,
575 static CV1800_GATE(clk_ddr_axi_reg, clk_axi6_bus_parents,
580 static CV1800_GATE(clk_apb_i2c, clk_axi4_bus_parents,
588 static CV1800_GATE(clk_apb_i2c0, clk_axi4_bus_parents,
591 static CV1800_GATE(clk_apb_i2c1, clk_axi4_bus_parents,
594 static CV1800_GATE(clk_apb_i2c2, clk_axi4_bus_parents,
597 static CV1800_GATE(clk_apb_i2c3, clk_axi4_bus_parents,
600 static CV1800_GATE(clk_apb_i2c4, clk_axi4_bus_parents,
605 static CV1800_GATE(clk_axi4_usb, clk_axi4_bus_parents,
608 static CV1800_GATE(clk_apb_usb, clk_axi4_bus_parents,
678 static CV1800_GATE(clk_csi_mac0_vip, clk_axi_vip_bus_parents,
681 static CV1800_GATE(clk_csi_mac1_vip, clk_axi_vip_bus_parents,
684 static CV1800_GATE(clk_isp_top_vip, clk_axi_vip_bus_parents,
687 static CV1800_GATE(clk_img_d_vip, clk_axi_vip_bus_parents,
690 static CV1800_GATE(clk_img_v_vip, clk_axi_vip_bus_parents,
693 static CV1800_GATE(clk_sc_top_vip, clk_axi_vip_bus_parents,
696 static CV1800_GATE(clk_sc_d_vip, clk_axi_vip_bus_parents,
699 static CV1800_GATE(clk_sc_v1_vip, clk_axi_vip_bus_parents,
702 static CV1800_GATE(clk_sc_v2_vip, clk_axi_vip_bus_parents,
705 static CV1800_GATE(clk_sc_v3_vip, clk_axi_vip_bus_parents,
708 static CV1800_GATE(clk_dwa_vip, clk_axi_vip_bus_parents,
711 static CV1800_GATE(clk_bt_vip, clk_axi_vip_bus_parents,
714 static CV1800_GATE(clk_disp_vip, clk_axi_vip_bus_parents,
717 static CV1800_GATE(clk_dsi_mac_vip, clk_axi_vip_bus_parents,
720 static CV1800_GATE(clk_lvds0_vip, clk_axi_vip_bus_parents,
723 static CV1800_GATE(clk_lvds1_vip, clk_axi_vip_bus_parents,
726 static CV1800_GATE(clk_csi0_rx_vip, clk_axi_vip_bus_parents,
729 static CV1800_GATE(clk_csi1_rx_vip, clk_axi_vip_bus_parents,
732 static CV1800_GATE(clk_pad_vi_vip, clk_axi_vip_bus_parents,
735 static CV1800_GATE(clk_pad_vi1_vip, clk_axi_vip_bus_parents,
738 static CV1800_GATE(clk_cfg_reg_vip, clk_axi6_bus_parents,
741 static CV1800_GATE(clk_pad_vi2_vip, clk_axi_vip_bus_parents,
744 static CV1800_GATE(clk_csi_be_vip, clk_axi_vip_bus_parents,
747 static CV1800_GATE(clk_vip_ip0, clk_axi_vip_bus_parents,
750 static CV1800_GATE(clk_vip_ip1, clk_axi_vip_bus_parents,
753 static CV1800_GATE(clk_vip_ip2, clk_axi_vip_bus_parents,
756 static CV1800_GATE(clk_vip_ip3, clk_axi_vip_bus_parents,
771 static CV1800_GATE(clk_ive_vip, clk_axi_vip_bus_parents,
774 static CV1800_GATE(clk_raw_vip, clk_axi_vip_bus_parents,
777 static CV1800_GATE(clk_osdc_vip, clk_axi_vip_bus_parents,
780 static CV1800_GATE(clk_csi_mac2_vip, clk_axi_vip_bus_parents,
783 static CV1800_GATE(clk_cam0_vip, clk_axi_vip_bus_parents,
844 static CV1800_GATE(clk_h264c, clk_axi_video_codec_bus_parents,
847 static CV1800_GATE(clk_h265c, clk_axi_video_codec_bus_parents,
850 static CV1800_GATE(clk_jpeg, clk_axi_video_codec_bus_parents,
853 static CV1800_GATE(clk_apb_jpeg, clk_axi6_bus_parents,
856 static CV1800_GATE(clk_apb_h264c, clk_axi6_bus_parents,
859 static CV1800_GATE(clk_apb_h265c, clk_axi6_bus_parents,
874 static CV1800_GATE(clk_cfg_reg_vc, clk_axi6_bus_parents,
890 static CV1800_GATE(clk_pwm, clk_pwm_parents,
970 static CV1800_GATE(clk_xtal_ap, osc_parents,