127 struct clk_hw *s10_register_gate(const struct stratix10_gate_clock *clks, void __iomem *regbase)  in s10_register_gate()  argument
132 	const char *parent_name = clks->parent_name;  in s10_register_gate()
139 	socfpga_clk->hw.reg = regbase + clks->gate_reg;  in s10_register_gate()
140 	socfpga_clk->hw.bit_idx = clks->gate_idx;  in s10_register_gate()
145 	socfpga_clk->fixed_div = clks->fixed_div;  in s10_register_gate()
147 	if (clks->div_reg)  in s10_register_gate()
148 		socfpga_clk->div_reg = regbase + clks->div_reg;  in s10_register_gate()
152 	socfpga_clk->width = clks->div_width;  in s10_register_gate()
153 	socfpga_clk->shift = clks->div_offset;  in s10_register_gate()
155 	if (clks->bypass_reg)  in s10_register_gate()
156 		socfpga_clk->bypass_reg = regbase + clks->bypass_reg;  in s10_register_gate()
159 	socfpga_clk->bypass_shift = clks->bypass_shift;  in s10_register_gate()
161 	if (streq(clks->name, "cs_pdbg_clk"))  in s10_register_gate()
166 	init.name = clks->name;  in s10_register_gate()
167 	init.flags = clks->flags;  in s10_register_gate()
169 	init.num_parents = clks->num_parents;  in s10_register_gate()
172 		init.parent_data = clks->parent_data;  in s10_register_gate()
185 struct clk_hw *agilex_register_gate(const struct stratix10_gate_clock *clks, void __iomem *regbase)  in agilex_register_gate()  argument
190 	const char *parent_name = clks->parent_name;  in agilex_register_gate()
197 	socfpga_clk->hw.reg = regbase + clks->gate_reg;  in agilex_register_gate()
198 	socfpga_clk->hw.bit_idx = clks->gate_idx;  in agilex_register_gate()
203 	socfpga_clk->fixed_div = clks->fixed_div;  in agilex_register_gate()
205 	if (clks->div_reg)  in agilex_register_gate()
206 		socfpga_clk->div_reg = regbase + clks->div_reg;  in agilex_register_gate()
210 	socfpga_clk->width = clks->div_width;  in agilex_register_gate()
211 	socfpga_clk->shift = clks->div_offset;  in agilex_register_gate()
213 	if (clks->bypass_reg)  in agilex_register_gate()
214 		socfpga_clk->bypass_reg = regbase + clks->bypass_reg;  in agilex_register_gate()
217 	socfpga_clk->bypass_shift = clks->bypass_shift;  in agilex_register_gate()
219 	if (streq(clks->name, "cs_pdbg_clk"))  in agilex_register_gate()
224 	init.name = clks->name;  in agilex_register_gate()
225 	init.flags = clks->flags;  in agilex_register_gate()
227 	init.num_parents = clks->num_parents;  in agilex_register_gate()
230 		init.parent_data = clks->parent_data;  in agilex_register_gate()