Lines Matching +full:fixed +full:- +full:factor +full:- +full:clock

1 /* SPDX-License-Identifier: GPL-2.0-only */
7  * Common Clock Framework support for all Samsung platforms
13 #include <linux/clk-provider.h>
15 #include "clk-pll.h"
16 #include "clk-cpu.h"
19  * struct samsung_clk_provider - information about clock provider
21  * @dev: clock provider device needed for runtime PM
22  * @lock: maintains exclusion between callbacks for a given clock-provider
23  * @clk_data: holds clock related data like clk_hw* and number of clocks
34  * struct samsung_clock_alias - information about mux clock
35  * @id: platform specific id of the clock
36  * @dev_name: name of the device to which this clock belongs
37  * @alias: optional clock alias name to be assigned to this clock
55  * struct samsung_fixed_rate_clock - information about fixed-rate clock
56  * @id: platform specific id of the clock
57  * @name: name of this fixed-rate clock
58  * @parent_name: optional parent clock name
59  * @flags: optional fixed-rate clock flags
60  * @fixed_rate: fixed clock rate of this clock
80  * struct samsung_fixed_factor_clock - information about fixed-factor clock
81  * @id: platform specific id of the clock
82  * @name: name of this fixed-factor clock
83  * @parent_name: parent clock name
84  * @mult: fixed multiplication factor
85  * @div: fixed division factor
86  * @flags: optional fixed-factor clock flags
108  * struct samsung_mux_clock - information about mux clock
109  * @id: platform specific id of the clock
110  * @name: name of this mux clock
111  * @parent_names: array of pointer to parent clock names
113  * @flags: optional flags for basic clock
115  * @shift: starting bit location of the mux control bit-field in @reg
116  * @width: width of the mux control bit-field in @reg
117  * @mux_flags: flags for mux-type clock
150 /* Used by MUX clocks where reparenting on clock rate change is allowed. */
158  * struct samsung_div_clock - information about div clock
159  * @id: platform specific id of the clock
160  * @name: name of this div clock
161  * @parent_name: name of the parent clock
162  * @flags: optional flags for basic clock
164  * @shift: starting bit location of the div control bit-field in @reg
166  * @div_flags: flags for div-type clock
204  * struct samsung_gate_clock - information about gate clock
205  * @id: platform specific id of the clock
206  * @name: name of this gate clock
207  * @parent_name: name of the parent clock
208  * @flags: optional flags for basic clock
210  * @bit_idx: bit index of the gate control bit-field in @reg
211  * @gate_flags: flags for gate-type clock
240  * struct samsung_clk_reg_dump - register dump of clock controller registers
241  * @offset: clock register offset from the controller base address
250  * struct samsung_pll_clock - information about pll clock
251  * @id: platform specific id of the clock
252  * @name: name of this pll clock
253  * @parent_name: name of the parent clock
254  * @flags: optional flags for basic clock
320  * struct samsung_cmu_info - all clocks information needed for CMU registration
329  * @fixed_clks: list of fixed clocks
331  * @fixed_factor_clks: list of fixed factor clocks
336  * @clk_regs: list of clock registers
337  * @nr_clk_regs: count of clock registers in @clk_regs
338  * @suspend_regs: list of clock registers to set before suspend
339  * @nr_suspend_regs: count of clock registers in @suspend_regs
340  * @clk_name: name of the parent clock needed for CMU register access