Lines Matching refs:__initdata
63 static unsigned long s3c64xx_clk_regs[] __initdata = {
80 static unsigned long s3c6410_clk_regs[] __initdata = {
112 FIXED_RATE_CLOCKS(s3c64xx_fixed_rate_ext_clks) __initdata = {
118 FIXED_RATE_CLOCKS(s3c64xx_fixed_rate_clks) __initdata = {
124 MUX_CLOCKS(s3c64xx_mux_clks) __initdata = {
141 MUX_CLOCKS(s3c6400_mux_clks) __initdata = {
149 MUX_CLOCKS(s3c6410_mux_clks) __initdata = {
160 DIV_CLOCKS(s3c64xx_div_clks) __initdata = {
184 DIV_CLOCKS(s3c6400_div_clks) __initdata = {
189 DIV_CLOCKS(s3c6410_div_clks) __initdata = {
196 GATE_CLOCKS(s3c64xx_gate_clks) __initdata = {
276 GATE_CLOCKS(s3c6400_gate_clks) __initdata = {
282 GATE_CLOCKS(s3c6410_gate_clks) __initdata = {
300 static struct samsung_pll_clock s3c64xx_pll_clks[] __initdata = {