Lines Matching full:reg_base
21 static void __iomem *reg_base; variable
46 reg_save[i][1] = readl(reg_base + reg_save[i][0]); in exynos_audss_clk_suspend()
56 writel(reg_save[i][1], reg_base + reg_save[i][0]); in exynos_audss_clk_resume()
138 reg_base = devm_platform_ioremap_resource(pdev, 0); in exynos_audss_clk_probe()
139 if (IS_ERR(reg_base)) in exynos_audss_clk_probe()
140 return PTR_ERR(reg_base); in exynos_audss_clk_probe()
186 reg_base + ASS_CLK_SRC, 0, 1, 0, &lock); in exynos_audss_clk_probe()
197 reg_base + ASS_CLK_SRC, 2, 2, 0, &lock); in exynos_audss_clk_probe()
201 reg_base + ASS_CLK_DIV, 0, 4, 0, &lock); in exynos_audss_clk_probe()
205 reg_base + ASS_CLK_DIV, 4, 4, 0, &lock); in exynos_audss_clk_probe()
208 "mout_i2s", 0, reg_base + ASS_CLK_DIV, 8, 4, 0, in exynos_audss_clk_probe()
213 reg_base + ASS_CLK_GATE, 0, 0, &lock); in exynos_audss_clk_probe()
217 reg_base + ASS_CLK_GATE, 2, 0, &lock); in exynos_audss_clk_probe()
221 reg_base + ASS_CLK_GATE, 3, 0, &lock); in exynos_audss_clk_probe()
225 reg_base + ASS_CLK_GATE, 4, 0, &lock); in exynos_audss_clk_probe()
232 reg_base + ASS_CLK_GATE, 5, 0, &lock); in exynos_audss_clk_probe()
237 reg_base + ASS_CLK_GATE, 9, 0, &lock); in exynos_audss_clk_probe()