Lines Matching +full:clk +full:- +full:gate

1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * Author: Xing Zheng <zhengxing@rock-chips.com>
11 * samsung/clk.c
18 #include <linux/clk.h>
19 #include <linux/clk-provider.h>
26 #include "../clk-fractional-divider.h"
27 #include "clk.h"
33 * src1 --|--\
34 * |M |--[GATE]-[DIV]-
35 * src2 --|--/
39 static struct clk *rockchip_clk_register_branch(const char *name, in rockchip_clk_register_branch()
51 struct clk_gate *gate = NULL; in rockchip_clk_register_branch() local
60 return ERR_PTR(-ENOMEM); in rockchip_clk_register_branch()
62 mux->reg = base + muxdiv_offset; in rockchip_clk_register_branch()
63 mux->shift = mux_shift; in rockchip_clk_register_branch()
64 mux->mask = BIT(mux_width) - 1; in rockchip_clk_register_branch()
65 mux->flags = mux_flags; in rockchip_clk_register_branch()
66 mux->table = mux_table; in rockchip_clk_register_branch()
67 mux->lock = lock; in rockchip_clk_register_branch()
73 gate = kzalloc(sizeof(*gate), GFP_KERNEL); in rockchip_clk_register_branch()
74 if (!gate) { in rockchip_clk_register_branch()
75 ret = -ENOMEM; in rockchip_clk_register_branch()
79 gate->flags = gate_flags; in rockchip_clk_register_branch()
80 gate->reg = base + gate_offset; in rockchip_clk_register_branch()
81 gate->bit_idx = gate_shift; in rockchip_clk_register_branch()
82 gate->lock = lock; in rockchip_clk_register_branch()
89 ret = -ENOMEM; in rockchip_clk_register_branch()
93 div->flags = div_flags; in rockchip_clk_register_branch()
95 div->reg = base + div_offset; in rockchip_clk_register_branch()
97 div->reg = base + muxdiv_offset; in rockchip_clk_register_branch()
98 div->shift = div_shift; in rockchip_clk_register_branch()
99 div->width = div_width; in rockchip_clk_register_branch()
100 div->lock = lock; in rockchip_clk_register_branch()
101 div->table = div_table; in rockchip_clk_register_branch()
108 mux ? &mux->hw : NULL, mux_ops, in rockchip_clk_register_branch()
109 div ? &div->hw : NULL, div_ops, in rockchip_clk_register_branch()
110 gate ? &gate->hw : NULL, gate_ops, in rockchip_clk_register_branch()
114 kfree(gate); in rockchip_clk_register_branch()
118 return hw->clk; in rockchip_clk_register_branch()
120 kfree(gate); in rockchip_clk_register_branch()
129 struct clk_gate gate; member
147 struct clk_mux *frac_mux = &frac->mux; in rockchip_clk_frac_notifier_cb()
151 __func__, event, ndata->old_rate, ndata->new_rate); in rockchip_clk_frac_notifier_cb()
153 frac->rate_change_idx = in rockchip_clk_frac_notifier_cb()
154 frac->mux_ops->get_parent(&frac_mux->hw); in rockchip_clk_frac_notifier_cb()
155 if (frac->rate_change_idx != frac->mux_frac_idx) { in rockchip_clk_frac_notifier_cb()
156 frac->mux_ops->set_parent(&frac_mux->hw, in rockchip_clk_frac_notifier_cb()
157 frac->mux_frac_idx); in rockchip_clk_frac_notifier_cb()
158 frac->rate_change_remuxed = 1; in rockchip_clk_frac_notifier_cb()
167 if (frac->rate_change_remuxed) { in rockchip_clk_frac_notifier_cb()
168 frac->mux_ops->set_parent(&frac_mux->hw, in rockchip_clk_frac_notifier_cb()
169 frac->rate_change_idx); in rockchip_clk_frac_notifier_cb()
170 frac->rate_change_remuxed = 0; in rockchip_clk_frac_notifier_cb()
196 fd->flags |= CLK_FRAC_DIVIDER_POWER_OF_TWO_PS; in rockchip_fractional_approximation()
201 static struct clk *rockchip_clk_register_frac_branch( in rockchip_clk_register_frac_branch()
211 struct clk_gate *gate = NULL; in rockchip_clk_register_frac_branch() local
216 return ERR_PTR(-EINVAL); in rockchip_clk_register_frac_branch()
218 if (child && child->branch_type != branch_mux) { in rockchip_clk_register_frac_branch()
221 return ERR_PTR(-EINVAL); in rockchip_clk_register_frac_branch()
226 return ERR_PTR(-ENOMEM); in rockchip_clk_register_frac_branch()
229 gate = &frac->gate; in rockchip_clk_register_frac_branch()
230 gate->flags = gate_flags; in rockchip_clk_register_frac_branch()
231 gate->reg = base + gate_offset; in rockchip_clk_register_frac_branch()
232 gate->bit_idx = gate_shift; in rockchip_clk_register_frac_branch()
233 gate->lock = lock; in rockchip_clk_register_frac_branch()
237 div = &frac->div; in rockchip_clk_register_frac_branch()
238 div->flags = div_flags; in rockchip_clk_register_frac_branch()
239 div->reg = base + muxdiv_offset; in rockchip_clk_register_frac_branch()
240 div->mshift = 16; in rockchip_clk_register_frac_branch()
241 div->mwidth = 16; in rockchip_clk_register_frac_branch()
242 div->nshift = 0; in rockchip_clk_register_frac_branch()
243 div->nwidth = 16; in rockchip_clk_register_frac_branch()
244 div->lock = lock; in rockchip_clk_register_frac_branch()
245 div->approximation = rockchip_fractional_approximation; in rockchip_clk_register_frac_branch()
250 &div->hw, div_ops, in rockchip_clk_register_frac_branch()
251 gate ? &gate->hw : NULL, gate_ops, in rockchip_clk_register_frac_branch()
259 struct clk_mux *frac_mux = &frac->mux; in rockchip_clk_register_frac_branch()
261 struct clk *mux_clk; in rockchip_clk_register_frac_branch()
264 frac->mux_frac_idx = match_string(child->parent_names, in rockchip_clk_register_frac_branch()
265 child->num_parents, name); in rockchip_clk_register_frac_branch()
266 frac->mux_ops = &clk_mux_ops; in rockchip_clk_register_frac_branch()
267 frac->clk_nb.notifier_call = rockchip_clk_frac_notifier_cb; in rockchip_clk_register_frac_branch()
269 frac_mux->reg = base + child->muxdiv_offset; in rockchip_clk_register_frac_branch()
270 frac_mux->shift = child->mux_shift; in rockchip_clk_register_frac_branch()
271 frac_mux->mask = BIT(child->mux_width) - 1; in rockchip_clk_register_frac_branch()
272 frac_mux->flags = child->mux_flags; in rockchip_clk_register_frac_branch()
273 if (child->mux_table) in rockchip_clk_register_frac_branch()
274 frac_mux->table = child->mux_table; in rockchip_clk_register_frac_branch()
275 frac_mux->lock = lock; in rockchip_clk_register_frac_branch()
276 frac_mux->hw.init = &init; in rockchip_clk_register_frac_branch()
278 init.name = child->name; in rockchip_clk_register_frac_branch()
279 init.flags = child->flags | CLK_SET_RATE_PARENT; in rockchip_clk_register_frac_branch()
280 init.ops = frac->mux_ops; in rockchip_clk_register_frac_branch()
281 init.parent_names = child->parent_names; in rockchip_clk_register_frac_branch()
282 init.num_parents = child->num_parents; in rockchip_clk_register_frac_branch()
284 mux_clk = clk_register(NULL, &frac_mux->hw); in rockchip_clk_register_frac_branch()
290 rockchip_clk_set_lookup(ctx, mux_clk, child->id); in rockchip_clk_register_frac_branch()
293 if (frac->mux_frac_idx >= 0) { in rockchip_clk_register_frac_branch()
295 __func__, frac->mux_frac_idx); in rockchip_clk_register_frac_branch()
296 ret = clk_notifier_register(hw->clk, &frac->clk_nb); in rockchip_clk_register_frac_branch()
302 __func__, name, child->name); in rockchip_clk_register_frac_branch()
306 return hw->clk; in rockchip_clk_register_frac_branch()
309 static struct clk *rockchip_clk_register_factor_branch(const char *name, in rockchip_clk_register_factor_branch()
316 struct clk_gate *gate = NULL; in rockchip_clk_register_factor_branch() local
319 /* without gate, register a simple factor clock */ in rockchip_clk_register_factor_branch()
326 gate = kzalloc(sizeof(*gate), GFP_KERNEL); in rockchip_clk_register_factor_branch()
327 if (!gate) in rockchip_clk_register_factor_branch()
328 return ERR_PTR(-ENOMEM); in rockchip_clk_register_factor_branch()
330 gate->flags = gate_flags; in rockchip_clk_register_factor_branch()
331 gate->reg = base + gate_offset; in rockchip_clk_register_factor_branch()
332 gate->bit_idx = gate_shift; in rockchip_clk_register_factor_branch()
333 gate->lock = lock; in rockchip_clk_register_factor_branch()
337 kfree(gate); in rockchip_clk_register_factor_branch()
338 return ERR_PTR(-ENOMEM); in rockchip_clk_register_factor_branch()
341 fix->mult = mult; in rockchip_clk_register_factor_branch()
342 fix->div = div; in rockchip_clk_register_factor_branch()
346 &fix->hw, &clk_fixed_factor_ops, in rockchip_clk_register_factor_branch()
347 &gate->hw, &clk_gate_ops, flags); in rockchip_clk_register_factor_branch()
350 kfree(gate); in rockchip_clk_register_factor_branch()
354 return hw->clk; in rockchip_clk_register_factor_branch()
362 struct clk **clk_table; in rockchip_clk_init_base()
363 struct clk *default_clk_val; in rockchip_clk_init_base()
366 default_clk_val = ERR_PTR(has_late_clocks ? -EPROBE_DEFER : -ENOENT); in rockchip_clk_init_base()
370 return ERR_PTR(-ENOMEM); in rockchip_clk_init_base()
372 clk_table = kcalloc(nr_clks, sizeof(struct clk *), GFP_KERNEL); in rockchip_clk_init_base()
379 ctx->reg_base = base; in rockchip_clk_init_base()
380 ctx->clk_data.clks = clk_table; in rockchip_clk_init_base()
381 ctx->clk_data.clk_num = nr_clks; in rockchip_clk_init_base()
382 ctx->cru_node = np; in rockchip_clk_init_base()
383 spin_lock_init(&ctx->lock); in rockchip_clk_init_base()
385 hash_init(ctx->aux_grf_table); in rockchip_clk_init_base()
387 ctx->grf = syscon_regmap_lookup_by_phandle(ctx->cru_node, in rockchip_clk_init_base()
394 return ERR_PTR(-ENOMEM); in rockchip_clk_init_base()
417 for (i = 0; i < ctx->clk_data.clk_num; ++i) in rockchip_clk_finalize()
418 if (ctx->clk_data.clks[i] == ERR_PTR(-EPROBE_DEFER)) in rockchip_clk_finalize()
419 ctx->clk_data.clks[i] = ERR_PTR(-ENOENT); in rockchip_clk_finalize()
427 &ctx->clk_data)) in rockchip_clk_of_add_provider()
428 pr_err("%s: could not register clk provider\n", __func__); in rockchip_clk_of_add_provider()
436 struct clk *clk; in rockchip_clk_register_plls() local
440 clk = rockchip_clk_register_pll(ctx, list->type, list->name, in rockchip_clk_register_plls()
441 list->parent_names, list->num_parents, in rockchip_clk_register_plls()
442 list->con_offset, grf_lock_offset, in rockchip_clk_register_plls()
443 list->lock_shift, list->mode_offset, in rockchip_clk_register_plls()
444 list->mode_shift, list->rate_table, in rockchip_clk_register_plls()
445 list->flags, list->pll_flags); in rockchip_clk_register_plls()
446 if (IS_ERR(clk)) { in rockchip_clk_register_plls()
448 list->name); in rockchip_clk_register_plls()
452 rockchip_clk_set_lookup(ctx, clk, list->id); in rockchip_clk_register_plls()
464 if (list->id > max) in rockchip_clk_find_max_clk_id()
465 max = list->id; in rockchip_clk_find_max_clk_id()
466 if (list->child && list->child->id > max) in rockchip_clk_find_max_clk_id()
467 max = list->child->id; in rockchip_clk_find_max_clk_id()
486 .name = "rockchip-gate-link-clk", in rockchip_clk_register_gate_link()
487 .id = clkbr->id, in rockchip_clk_register_gate_link()
501 struct regmap *grf = ctx->grf; in rockchip_clk_register_branches()
503 struct clk *clk; in rockchip_clk_register_branches() local
508 flags = list->flags; in rockchip_clk_register_branches()
509 clk = NULL; in rockchip_clk_register_branches()
511 /* for GRF-dependent branches, choose the right grf first */ in rockchip_clk_register_branches()
512 if ((list->branch_type == branch_grf_mux || in rockchip_clk_register_branches()
513 list->branch_type == branch_grf_gate || in rockchip_clk_register_branches()
514 list->branch_type == branch_grf_mmc) && in rockchip_clk_register_branches()
515 list->grf_type != grf_type_sys) { in rockchip_clk_register_branches()
516 hash_for_each_possible(ctx->aux_grf_table, agrf, node, list->grf_type) { in rockchip_clk_register_branches()
517 if (agrf->type == list->grf_type) { in rockchip_clk_register_branches()
518 grf = agrf->grf; in rockchip_clk_register_branches()
525 switch (list->branch_type) { in rockchip_clk_register_branches()
527 if (list->mux_table) in rockchip_clk_register_branches()
528 clk = clk_register_mux_table(NULL, list->name, in rockchip_clk_register_branches()
529 list->parent_names, list->num_parents, in rockchip_clk_register_branches()
531 ctx->reg_base + list->muxdiv_offset, in rockchip_clk_register_branches()
532 list->mux_shift, list->mux_width, in rockchip_clk_register_branches()
533 list->mux_flags, list->mux_table, in rockchip_clk_register_branches()
534 &ctx->lock); in rockchip_clk_register_branches()
536 clk = clk_register_mux(NULL, list->name, in rockchip_clk_register_branches()
537 list->parent_names, list->num_parents, in rockchip_clk_register_branches()
539 ctx->reg_base + list->muxdiv_offset, in rockchip_clk_register_branches()
540 list->mux_shift, list->mux_width, in rockchip_clk_register_branches()
541 list->mux_flags, &ctx->lock); in rockchip_clk_register_branches()
544 clk = rockchip_clk_register_muxgrf(list->name, in rockchip_clk_register_branches()
545 list->parent_names, list->num_parents, in rockchip_clk_register_branches()
546 flags, grf, list->muxdiv_offset, in rockchip_clk_register_branches()
547 list->mux_shift, list->mux_width, in rockchip_clk_register_branches()
548 list->mux_flags); in rockchip_clk_register_branches()
551 if (list->div_table) in rockchip_clk_register_branches()
552 clk = clk_register_divider_table(NULL, in rockchip_clk_register_branches()
553 list->name, list->parent_names[0], in rockchip_clk_register_branches()
555 ctx->reg_base + list->muxdiv_offset, in rockchip_clk_register_branches()
556 list->div_shift, list->div_width, in rockchip_clk_register_branches()
557 list->div_flags, list->div_table, in rockchip_clk_register_branches()
558 &ctx->lock); in rockchip_clk_register_branches()
560 clk = clk_register_divider(NULL, list->name, in rockchip_clk_register_branches()
561 list->parent_names[0], flags, in rockchip_clk_register_branches()
562 ctx->reg_base + list->muxdiv_offset, in rockchip_clk_register_branches()
563 list->div_shift, list->div_width, in rockchip_clk_register_branches()
564 list->div_flags, &ctx->lock); in rockchip_clk_register_branches()
567 clk = rockchip_clk_register_frac_branch(ctx, list->name, in rockchip_clk_register_branches()
568 list->parent_names, list->num_parents, in rockchip_clk_register_branches()
569 ctx->reg_base, list->muxdiv_offset, in rockchip_clk_register_branches()
570 list->div_flags, in rockchip_clk_register_branches()
571 list->gate_offset, list->gate_shift, in rockchip_clk_register_branches()
572 list->gate_flags, flags, list->child, in rockchip_clk_register_branches()
573 &ctx->lock); in rockchip_clk_register_branches()
576 clk = rockchip_clk_register_halfdiv(list->name, in rockchip_clk_register_branches()
577 list->parent_names, list->num_parents, in rockchip_clk_register_branches()
578 ctx->reg_base, list->muxdiv_offset, in rockchip_clk_register_branches()
579 list->mux_shift, list->mux_width, in rockchip_clk_register_branches()
580 list->mux_flags, list->div_shift, in rockchip_clk_register_branches()
581 list->div_width, list->div_flags, in rockchip_clk_register_branches()
582 list->gate_offset, list->gate_shift, in rockchip_clk_register_branches()
583 list->gate_flags, flags, &ctx->lock); in rockchip_clk_register_branches()
588 clk = clk_register_gate(NULL, list->name, in rockchip_clk_register_branches()
589 list->parent_names[0], flags, in rockchip_clk_register_branches()
590 ctx->reg_base + list->gate_offset, in rockchip_clk_register_branches()
591 list->gate_shift, list->gate_flags, &ctx->lock); in rockchip_clk_register_branches()
595 clk = rockchip_clk_register_gate_grf(list->name, in rockchip_clk_register_branches()
596 list->parent_names[0], flags, grf, in rockchip_clk_register_branches()
597 list->gate_offset, list->gate_shift, in rockchip_clk_register_branches()
598 list->gate_flags); in rockchip_clk_register_branches()
601 clk = rockchip_clk_register_branch(list->name, in rockchip_clk_register_branches()
602 list->parent_names, list->num_parents, in rockchip_clk_register_branches()
603 ctx->reg_base, list->muxdiv_offset, in rockchip_clk_register_branches()
604 list->mux_shift, in rockchip_clk_register_branches()
605 list->mux_width, list->mux_flags, in rockchip_clk_register_branches()
606 list->mux_table, list->div_offset, in rockchip_clk_register_branches()
607 list->div_shift, list->div_width, in rockchip_clk_register_branches()
608 list->div_flags, list->div_table, in rockchip_clk_register_branches()
609 list->gate_offset, list->gate_shift, in rockchip_clk_register_branches()
610 list->gate_flags, flags, &ctx->lock); in rockchip_clk_register_branches()
613 clk = rockchip_clk_register_mmc( in rockchip_clk_register_branches()
614 list->name, in rockchip_clk_register_branches()
615 list->parent_names, list->num_parents, in rockchip_clk_register_branches()
616 ctx->reg_base + list->muxdiv_offset, in rockchip_clk_register_branches()
618 list->div_shift in rockchip_clk_register_branches()
622 clk = rockchip_clk_register_mmc( in rockchip_clk_register_branches()
623 list->name, in rockchip_clk_register_branches()
624 list->parent_names, list->num_parents, in rockchip_clk_register_branches()
626 grf, list->muxdiv_offset, in rockchip_clk_register_branches()
627 list->div_shift in rockchip_clk_register_branches()
631 clk = rockchip_clk_register_inverter( in rockchip_clk_register_branches()
632 list->name, list->parent_names, in rockchip_clk_register_branches()
633 list->num_parents, in rockchip_clk_register_branches()
634 ctx->reg_base + list->muxdiv_offset, in rockchip_clk_register_branches()
635 list->div_shift, list->div_flags, &ctx->lock); in rockchip_clk_register_branches()
638 clk = rockchip_clk_register_factor_branch( in rockchip_clk_register_branches()
639 list->name, list->parent_names, in rockchip_clk_register_branches()
640 list->num_parents, ctx->reg_base, in rockchip_clk_register_branches()
641 list->div_shift, list->div_width, in rockchip_clk_register_branches()
642 list->gate_offset, list->gate_shift, in rockchip_clk_register_branches()
643 list->gate_flags, flags, &ctx->lock); in rockchip_clk_register_branches()
646 clk = rockchip_clk_register_ddrclk( in rockchip_clk_register_branches()
647 list->name, list->flags, in rockchip_clk_register_branches()
648 list->parent_names, list->num_parents, in rockchip_clk_register_branches()
649 list->muxdiv_offset, list->mux_shift, in rockchip_clk_register_branches()
650 list->mux_width, list->div_shift, in rockchip_clk_register_branches()
651 list->div_width, list->div_flags, in rockchip_clk_register_branches()
652 ctx->reg_base, &ctx->lock); in rockchip_clk_register_branches()
655 /* must be registered late, fall-through for error message */ in rockchip_clk_register_branches()
660 if (!clk) { in rockchip_clk_register_branches()
662 __func__, list->branch_type); in rockchip_clk_register_branches()
666 if (IS_ERR(clk)) { in rockchip_clk_register_branches()
668 __func__, list->name, PTR_ERR(clk)); in rockchip_clk_register_branches()
672 rockchip_clk_set_lookup(ctx, clk, list->id); in rockchip_clk_register_branches()
687 switch (list->branch_type) { in rockchip_clk_register_late_branches()
692 dev_err(dev, "unknown clock type %d\n", list->branch_type); in rockchip_clk_register_late_branches()
697 dev_err(dev, "failed to register device for clock %s\n", list->name); in rockchip_clk_register_late_branches()
710 struct clk *clk; in rockchip_clk_register_armclk() local
712 clk = rockchip_clk_register_cpuclk(name, parent_names, num_parents, in rockchip_clk_register_armclk()
714 ctx->reg_base, &ctx->lock); in rockchip_clk_register_armclk()
715 if (IS_ERR(clk)) { in rockchip_clk_register_armclk()
717 __func__, name, PTR_ERR(clk)); in rockchip_clk_register_armclk()
721 rockchip_clk_set_lookup(ctx, clk, lookup_id); in rockchip_clk_register_armclk()
732 struct clk *clk = __clk_lookup(clocks[i]); in rockchip_clk_protect_critical() local
734 clk_prepare_enable(clk); in rockchip_clk_protect_critical()
764 rst_base = ctx->reg_base; in rockchip_register_restart_notifier()