Lines Matching +full:usb +full:- +full:grf
1 // SPDX-License-Identifier: GPL-2.0
4 * Author: Elaine Zhang <zhangqing@rock-chips.com>
7 #include <linux/clk-provider.h>
14 #include <dt-bindings/clock/rockchip,rk3576-cru.h>
119 .val = HIWORD_UPDATE(_amcore - 1, RK3576_ACLK_M_BIGCORE_DIV_MASK, \
126 .val = HIWORD_UPDATE(_amcore - 1, RK3576_ACLK_M_LITCORE_DIV_MASK, \
133 .val = HIWORD_UPDATE(_pclkdbg - 1, RK3576_PCLK_DBG_LITCORE_DIV_MASK, \
142 HIWORD_UPDATE(_div - 1, RK3576_ACLK_CCI_DIV_MASK, \
390 * CRU Clock-Architecture
984 /* usb */
1748 pmu0_grf = syscon_regmap_lookup_by_compatible("rockchip,rk3576-pmu0-grf"); in rk3576_clk_init()
1750 pr_err("%s: could not get PMU0 GRF syscon\n", __func__); in rk3576_clk_init()
1754 ioc_grf = syscon_regmap_lookup_by_compatible("rockchip,rk3576-ioc-grf"); in rk3576_clk_init()
1756 pr_err("%s: could not get IOC GRF syscon\n", __func__); in rk3576_clk_init()
1776 pmu0_grf_e->grf = pmu0_grf; in rk3576_clk_init()
1777 pmu0_grf_e->type = grf_type_pmu0; in rk3576_clk_init()
1778 hash_add(ctx->aux_grf_table, &pmu0_grf_e->node, grf_type_pmu0); in rk3576_clk_init()
1784 ioc_grf_e->grf = ioc_grf; in rk3576_clk_init()
1785 ioc_grf_e->type = grf_type_ioc; in rk3576_clk_init()
1786 hash_add(ctx->aux_grf_table, &ioc_grf_e->node, grf_type_ioc); in rk3576_clk_init()
1819 CLK_OF_DECLARE(rk3576_cru, "rockchip,rk3576-cru", rk3576_clk_init);
1831 .compatible = "rockchip,rk3576-cru",
1840 struct device *dev = &pdev->dev; in clk_rk3576_probe()
1844 return -EINVAL; in clk_rk3576_probe()
1846 if (init_data->inits) in clk_rk3576_probe()
1847 init_data->inits(dev->of_node); in clk_rk3576_probe()
1855 .name = "clk-rk3576",