Lines Matching refs:pll_mux_ops
30 const struct clk_ops *pll_mux_ops; member
192 const struct clk_ops *pll_mux_ops = pll->pll_mux_ops; in rockchip_rk3036_pll_set_params() local
207 cur_parent = pll_mux_ops->get_parent(&pll_mux->hw); in rockchip_rk3036_pll_set_params()
209 pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_SLOW); in rockchip_rk3036_pll_set_params()
243 pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_NORM); in rockchip_rk3036_pll_set_params()
427 const struct clk_ops *pll_mux_ops = pll->pll_mux_ops; in rockchip_rk3066_pll_set_params() local
440 cur_parent = pll_mux_ops->get_parent(&pll_mux->hw); in rockchip_rk3066_pll_set_params()
442 pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_SLOW); in rockchip_rk3066_pll_set_params()
478 pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_NORM); in rockchip_rk3066_pll_set_params()
674 const struct clk_ops *pll_mux_ops = pll->pll_mux_ops; in rockchip_rk3399_pll_set_params() local
689 cur_parent = pll_mux_ops->get_parent(&pll_mux->hw); in rockchip_rk3399_pll_set_params()
691 pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_SLOW); in rockchip_rk3399_pll_set_params()
727 pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_NORM); in rockchip_rk3399_pll_set_params()
926 const struct clk_ops *pll_mux_ops = pll->pll_mux_ops; in rockchip_rk3588_pll_set_params() local
940 cur_parent = pll_mux_ops->get_parent(&pll_mux->hw); in rockchip_rk3588_pll_set_params()
942 pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_SLOW); in rockchip_rk3588_pll_set_params()
976 pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_NORM); in rockchip_rk3588_pll_set_params()
1088 pll->pll_mux_ops = &clk_mux_ops; in rockchip_clk_register_pll()
1114 init.ops = pll->pll_mux_ops; in rockchip_clk_register_pll()