Lines Matching full:rate

51 			    struct rockchip_clk_pll *pll, unsigned long rate)
57 		if (rate == rate_table[i].rate)
73 		if (drate >= rate_table[i].rate)
74 			return rate_table[i].rate;
78 	return rate_table[i - 1].rate;
140 					struct rockchip_pll_rate_table *rate)
145 	rate->fbdiv = ((pllcon >> RK3036_PLLCON0_FBDIV_SHIFT)
147 	rate->postdiv1 = ((pllcon >> RK3036_PLLCON0_POSTDIV1_SHIFT)
151 	rate->refdiv = ((pllcon >> RK3036_PLLCON1_REFDIV_SHIFT)
153 	rate->postdiv2 = ((pllcon >> RK3036_PLLCON1_POSTDIV2_SHIFT)
155 	rate->dsmpd = ((pllcon >> RK3036_PLLCON1_DSMPD_SHIFT)
159 	rate->frac = ((pllcon >> RK3036_PLLCON2_FRAC_SHIFT)
190 				const struct rockchip_pll_rate_table *rate)
200 	pr_debug("%s: rate settings for %lu fbdiv: %d, postdiv1: %d, refdiv: %d, postdiv2: %d, dsmpd: %d, frac: %d\n",
201 		__func__, rate->rate, rate->fbdiv, rate->postdiv1, rate->refdiv,
202 		rate->postdiv2, rate->dsmpd, rate->frac);
205 	cur.rate = 0;
216 	writel_relaxed(HIWORD_UPDATE(rate->fbdiv, RK3036_PLLCON0_FBDIV_MASK,
218 		       HIWORD_UPDATE(rate->postdiv1, RK3036_PLLCON0_POSTDIV1_MASK,
222 	writel_relaxed(HIWORD_UPDATE(rate->refdiv, RK3036_PLLCON1_REFDIV_MASK,
224 		       HIWORD_UPDATE(rate->postdiv2, RK3036_PLLCON1_POSTDIV2_MASK,
226 		       HIWORD_UPDATE(rate->dsmpd, RK3036_PLLCON1_DSMPD_MASK,
233 	pllcon |= rate->frac << RK3036_PLLCON2_FRAC_SHIFT;
254 	const struct rockchip_pll_rate_table *rate;
256 	pr_debug("%s: changing %s to %lu with a parent rate of %lu\n",
259 	/* Get required rate settings from table */
260 	rate = rockchip_get_pll_settings(pll, drate);
261 	if (!rate) {
262 		pr_err("%s: Invalid rate : %lu for pll clk %s\n", __func__,
267 	return rockchip_rk3036_pll_set_params(pll, rate);
301 	const struct rockchip_pll_rate_table *rate;
309 	rate = rockchip_get_pll_settings(pll, drate);
311 	/* when no rate setting for the current rate, rely on clk_set_rate */
312 	if (!rate)
323 		 rate->fbdiv, rate->postdiv1, rate->refdiv, rate->postdiv2,
324 		 rate->dsmpd, rate->frac);
326 	if (rate->fbdiv != cur.fbdiv || rate->postdiv1 != cur.postdiv1 ||
327 		rate->refdiv != cur.refdiv || rate->postdiv2 != cur.postdiv2 ||
328 		rate->dsmpd != cur.dsmpd ||
329 		(!cur.dsmpd && (rate->frac != cur.frac))) {
338 		pr_debug("%s: pll %s: rate params do not match rate table, adjusting\n",
340 		rockchip_rk3036_pll_set_params(pll, rate);
383 					struct rockchip_pll_rate_table *rate)
388 	rate->nr = ((pllcon >> RK3066_PLLCON0_NR_SHIFT)
390 	rate->no = ((pllcon >> RK3066_PLLCON0_OD_SHIFT)
394 	rate->nf = ((pllcon >> RK3066_PLLCON1_NF_SHIFT)
398 	rate->nb = ((pllcon >> RK3066_PLLCON2_NB_SHIFT)
427 				const struct rockchip_pll_rate_table *rate)
436 	pr_debug("%s: rate settings for %lu (nr, no, nf): (%d, %d, %d)\n",
437 		 __func__, rate->rate, rate->nr, rate->no, rate->nf);
440 	cur.rate = 0;
453 	writel(HIWORD_UPDATE(rate->nr - 1, RK3066_PLLCON0_NR_MASK,
455 	       HIWORD_UPDATE(rate->no - 1, RK3066_PLLCON0_OD_MASK,
459 	writel_relaxed(HIWORD_UPDATE(rate->nf - 1, RK3066_PLLCON1_NF_MASK,
462 	writel_relaxed(HIWORD_UPDATE(rate->nb - 1, RK3066_PLLCON2_NB_MASK,
469 	udelay(RK3066_PLL_RESET_DELAY(rate->nr));
489 	const struct rockchip_pll_rate_table *rate;
491 	pr_debug("%s: changing %s to %lu with a parent rate of %lu\n",
494 	/* Get required rate settings from table */
495 	rate = rockchip_get_pll_settings(pll, drate);
496 	if (!rate) {
497 		pr_err("%s: Invalid rate : %lu for pll clk %s\n", __func__,
502 	return rockchip_rk3066_pll_set_params(pll, rate);
536 	const struct rockchip_pll_rate_table *rate;
544 	rate = rockchip_get_pll_settings(pll, drate);
546 	/* when no rate setting for the current rate, rely on clk_set_rate */
547 	if (!rate)
553 		 __func__, clk_hw_get_name(hw), drate, rate->nr, cur.nr,
554 		 rate->no, cur.no, rate->nf, cur.nf, rate->nb, cur.nb);
555 	if (rate->nr != cur.nr || rate->no != cur.no || rate->nf != cur.nf
556 						     || rate->nb != cur.nb) {
557 		pr_debug("%s: pll %s: rate params do not match rate table, adjusting\n",
559 		rockchip_rk3066_pll_set_params(pll, rate);
622 					struct rockchip_pll_rate_table *rate)
627 	rate->fbdiv = ((pllcon >> RK3399_PLLCON0_FBDIV_SHIFT)
631 	rate->refdiv = ((pllcon >> RK3399_PLLCON1_REFDIV_SHIFT)
633 	rate->postdiv1 = ((pllcon >> RK3399_PLLCON1_POSTDIV1_SHIFT)
635 	rate->postdiv2 = ((pllcon >> RK3399_PLLCON1_POSTDIV2_SHIFT)
639 	rate->frac = ((pllcon >> RK3399_PLLCON2_FRAC_SHIFT)
643 	rate->dsmpd = ((pllcon >> RK3399_PLLCON3_DSMPD_SHIFT)
674 				const struct rockchip_pll_rate_table *rate)
684 	pr_debug("%s: rate settings for %lu fbdiv: %d, postdiv1: %d, refdiv: %d, postdiv2: %d, dsmpd: %d, frac: %d\n",
685 		__func__, rate->rate, rate->fbdiv, rate->postdiv1, rate->refdiv,
686 		rate->postdiv2, rate->dsmpd, rate->frac);
689 	cur.rate = 0;
698 	writel_relaxed(HIWORD_UPDATE(rate->fbdiv, RK3399_PLLCON0_FBDIV_MASK,
702 	writel_relaxed(HIWORD_UPDATE(rate->refdiv, RK3399_PLLCON1_REFDIV_MASK,
704 		       HIWORD_UPDATE(rate->postdiv1, RK3399_PLLCON1_POSTDIV1_MASK,
706 		       HIWORD_UPDATE(rate->postdiv2, RK3399_PLLCON1_POSTDIV2_MASK,
713 	pllcon |= rate->frac << RK3399_PLLCON2_FRAC_SHIFT;
716 	writel_relaxed(HIWORD_UPDATE(rate->dsmpd, RK3399_PLLCON3_DSMPD_MASK,
738 	const struct rockchip_pll_rate_table *rate;
740 	pr_debug("%s: changing %s to %lu with a parent rate of %lu\n",
743 	/* Get required rate settings from table */
744 	rate = rockchip_get_pll_settings(pll, drate);
745 	if (!rate) {
746 		pr_err("%s: Invalid rate : %lu for pll clk %s\n", __func__,
751 	return rockchip_rk3399_pll_set_params(pll, rate);
785 	const struct rockchip_pll_rate_table *rate;
793 	rate = rockchip_get_pll_settings(pll, drate);
795 	/* when no rate setting for the current rate, rely on clk_set_rate */
796 	if (!rate)
807 		 rate->fbdiv, rate->postdiv1, rate->refdiv, rate->postdiv2,
808 		 rate->dsmpd, rate->frac);
810 	if (rate->fbdiv != cur.fbdiv || rate->postdiv1 != cur.postdiv1 ||
811 		rate->refdiv != cur.refdiv || rate->postdiv2 != cur.postdiv2 ||
812 		rate->dsmpd != cur.dsmpd ||
813 		(!cur.dsmpd && (rate->frac != cur.frac))) {
822 		pr_debug("%s: pll %s: rate params do not match rate table, adjusting\n",
824 		rockchip_rk3399_pll_set_params(pll, rate);
883 					   struct rockchip_pll_rate_table *rate)
888 	rate->m = ((pllcon >> RK3588_PLLCON0_M_SHIFT) & RK3588_PLLCON0_M_MASK);
891 	rate->p = ((pllcon >> RK3588_PLLCON1_P_SHIFT) & RK3588_PLLCON1_P_MASK);
892 	rate->s = ((pllcon >> RK3588_PLLCON1_S_SHIFT) & RK3588_PLLCON1_S_MASK);
895 	rate->k = ((pllcon >> RK3588_PLLCON2_K_SHIFT) & RK3588_PLLCON2_K_MASK);
926 					  const struct rockchip_pll_rate_table *rate)
935 	pr_debug("%s: rate settings for %lu p: %d, m: %d, s: %d, k: %d\n",
936 		 __func__, rate->rate, rate->p, rate->m, rate->s, rate->k);
939 	cur.rate = 0;
955 	writel_relaxed(HIWORD_UPDATE(rate->m, RK3588_PLLCON0_M_MASK, RK3588_PLLCON0_M_SHIFT),
958 	writel_relaxed(HIWORD_UPDATE(rate->p, RK3588_PLLCON1_P_MASK, RK3588_PLLCON1_P_SHIFT) |
959 		       HIWORD_UPDATE(rate->s, RK3588_PLLCON1_S_MASK, RK3588_PLLCON1_S_SHIFT),
962 	writel_relaxed(HIWORD_UPDATE(rate->k, RK3588_PLLCON2_K_MASK, RK3588_PLLCON2_K_SHIFT),
987 	const struct rockchip_pll_rate_table *rate;
989 	pr_debug("%s: changing %s to %lu with a parent rate of %lu\n",
992 	/* Get required rate settings from table */
993 	rate = rockchip_get_pll_settings(pll, drate);
994 	if (!rate) {
995 		pr_err("%s: Invalid rate : %lu for pll clk %s\n", __func__,
1000 	return rockchip_rk3588_pll_set_params(pll, rate);
1129 		for (len = 0; rate_table[len].rate != 0; )
1138 			"%s: could not allocate rate table for %s\n",