Lines Matching refs:zclk

178 	struct cpg_z_clk *zclk = to_z_clk(hw);  in cpg_z_clk_recalc_rate()  local
182 val = readl(zclk->reg) & zclk->mask; in cpg_z_clk_recalc_rate()
183 mult = 32 - (val >> __ffs(zclk->mask)); in cpg_z_clk_recalc_rate()
186 32 * zclk->fixed_div); in cpg_z_clk_recalc_rate()
192 struct cpg_z_clk *zclk = to_z_clk(hw); in cpg_z_clk_determine_rate() local
197 if (rate <= zclk->max_rate) { in cpg_z_clk_determine_rate()
199 prate = zclk->max_rate; in cpg_z_clk_determine_rate()
205 prate * zclk->fixed_div); in cpg_z_clk_determine_rate()
207 prate = req->best_parent_rate / zclk->fixed_div; in cpg_z_clk_determine_rate()
223 struct cpg_z_clk *zclk = to_z_clk(hw); in cpg_z_clk_set_rate() local
227 mult = DIV64_U64_ROUND_CLOSEST(rate * 32ULL * zclk->fixed_div, in cpg_z_clk_set_rate()
231 if (readl(zclk->kick_reg) & CPG_FRQCRB_KICK) in cpg_z_clk_set_rate()
234 cpg_reg_modify(zclk->reg, zclk->mask, (32 - mult) << __ffs(zclk->mask)); in cpg_z_clk_set_rate()
240 cpg_reg_modify(zclk->kick_reg, 0, CPG_FRQCRB_KICK); in cpg_z_clk_set_rate()
252 if (!(readl(zclk->kick_reg) & CPG_FRQCRB_KICK)) in cpg_z_clk_set_rate()
276 struct cpg_z_clk *zclk; in __cpg_z_clk_register() local
279 zclk = kzalloc(sizeof(*zclk), GFP_KERNEL); in __cpg_z_clk_register()
280 if (!zclk) in __cpg_z_clk_register()
289 zclk->reg = reg + fcr; in __cpg_z_clk_register()
290 zclk->kick_reg = reg + CPG_FRQCRB; in __cpg_z_clk_register()
291 zclk->hw.init = &init; in __cpg_z_clk_register()
292 zclk->mask = GENMASK(offset + 4, offset); in __cpg_z_clk_register()
293 zclk->fixed_div = div; /* PLLVCO x 1/div x SYS-CPU divider */ in __cpg_z_clk_register()
295 clk = clk_register(NULL, &zclk->hw); in __cpg_z_clk_register()
297 kfree(zclk); in __cpg_z_clk_register()
301 zclk->max_rate = clk_hw_get_rate(clk_hw_get_parent(&zclk->hw)) / in __cpg_z_clk_register()
302 zclk->fixed_div; in __cpg_z_clk_register()