Lines Matching +full:9 +full:- +full:bit
1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/clk-provider.h>
13 #include <dt-bindings/clock/renesas,r9a09g057-cpg.h>
15 #include "rzv2h-cpg.h"
197 BUS_MSTOP(5, BIT(9))),
199 BUS_MSTOP(3, BIT(2))),
201 BUS_MSTOP(3, BIT(3))),
203 BUS_MSTOP(10, BIT(11))),
205 BUS_MSTOP(10, BIT(12))),
209 BUS_MSTOP(3, BIT(5))),
211 BUS_MSTOP(5, BIT(10))),
213 BUS_MSTOP(5, BIT(11))),
215 BUS_MSTOP(2, BIT(13))),
217 BUS_MSTOP(2, BIT(14))),
219 BUS_MSTOP(11, BIT(13))),
221 BUS_MSTOP(11, BIT(14))),
222 DEF_MOD("gtm_6_pclk", CLK_PLLCLN_DIV16, 4, 9, 2, 9,
223 BUS_MSTOP(11, BIT(15))),
225 BUS_MSTOP(12, BIT(0))),
227 BUS_MSTOP(3, BIT(10))),
229 BUS_MSTOP(3, BIT(10))),
231 BUS_MSTOP(1, BIT(0))),
233 BUS_MSTOP(1, BIT(0))),
235 BUS_MSTOP(5, BIT(12))),
237 BUS_MSTOP(5, BIT(12))),
239 BUS_MSTOP(5, BIT(13))),
241 BUS_MSTOP(5, BIT(13))),
243 BUS_MSTOP(11, BIT(0))),
245 BUS_MSTOP(11, BIT(0))),
247 BUS_MSTOP(11, BIT(0))),
249 BUS_MSTOP(11, BIT(1))),
251 BUS_MSTOP(11, BIT(1))),
252 DEF_MOD("rspi_1_tclk", CLK_PLLCLN_DIV8, 5, 9, 2, 25,
253 BUS_MSTOP(11, BIT(1))),
255 BUS_MSTOP(11, BIT(2))),
257 BUS_MSTOP(11, BIT(2))),
259 BUS_MSTOP(11, BIT(2))),
261 BUS_MSTOP(3, BIT(14))),
262 DEF_MOD("i3c_0_pclkrw", CLK_PLLCLN_DIV16, 9, 0, 4, 16,
263 BUS_MSTOP(10, BIT(15))),
264 DEF_MOD("i3c_0_pclk", CLK_PLLCLN_DIV16, 9, 1, 4, 17,
265 BUS_MSTOP(10, BIT(15))),
266 DEF_MOD("i3c_0_tclk", CLK_PLLCLN_DIV8, 9, 2, 4, 18,
267 BUS_MSTOP(10, BIT(15))),
268 DEF_MOD("riic_8_ckm", CLK_PLLCM33_DIV16, 9, 3, 4, 19,
269 BUS_MSTOP(3, BIT(13))),
270 DEF_MOD("riic_0_ckm", CLK_PLLCLN_DIV16, 9, 4, 4, 20,
271 BUS_MSTOP(1, BIT(1))),
272 DEF_MOD("riic_1_ckm", CLK_PLLCLN_DIV16, 9, 5, 4, 21,
273 BUS_MSTOP(1, BIT(2))),
274 DEF_MOD("riic_2_ckm", CLK_PLLCLN_DIV16, 9, 6, 4, 22,
275 BUS_MSTOP(1, BIT(3))),
276 DEF_MOD("riic_3_ckm", CLK_PLLCLN_DIV16, 9, 7, 4, 23,
277 BUS_MSTOP(1, BIT(4))),
278 DEF_MOD("riic_4_ckm", CLK_PLLCLN_DIV16, 9, 8, 4, 24,
279 BUS_MSTOP(1, BIT(5))),
280 DEF_MOD("riic_5_ckm", CLK_PLLCLN_DIV16, 9, 9, 4, 25,
281 BUS_MSTOP(1, BIT(6))),
282 DEF_MOD("riic_6_ckm", CLK_PLLCLN_DIV16, 9, 10, 4, 26,
283 BUS_MSTOP(1, BIT(7))),
284 DEF_MOD("riic_7_ckm", CLK_PLLCLN_DIV16, 9, 11, 4, 27,
285 BUS_MSTOP(1, BIT(8))),
286 DEF_MOD("spi_hclk", CLK_PLLCM33_GEAR, 9, 15, 4, 31,
287 BUS_MSTOP(4, BIT(5))),
289 BUS_MSTOP(4, BIT(5))),
291 BUS_MSTOP(4, BIT(5))),
293 BUS_MSTOP(8, BIT(2))),
295 BUS_MSTOP(8, BIT(2))),
297 BUS_MSTOP(8, BIT(2))),
299 BUS_MSTOP(8, BIT(2))),
301 BUS_MSTOP(8, BIT(3))),
303 BUS_MSTOP(8, BIT(3))),
304 DEF_MOD("sdhi_1_clk_hs", CLK_PLLCLN_DIV2, 10, 9, 5, 9,
305 BUS_MSTOP(8, BIT(3))),
307 BUS_MSTOP(8, BIT(3))),
309 BUS_MSTOP(8, BIT(4))),
311 BUS_MSTOP(8, BIT(4))),
313 BUS_MSTOP(8, BIT(4))),
315 BUS_MSTOP(8, BIT(4))),
317 BUS_MSTOP(7, BIT(7))),
319 BUS_MSTOP(7, BIT(8))),
321 BUS_MSTOP(7, BIT(9))),
323 BUS_MSTOP(7, BIT(10))),
325 BUS_MSTOP(7, BIT(11))),
327 BUS_MSTOP(8, BIT(5)), 1),
328 DEF_MOD_MUX_EXTERNAL("gbeth_0_clk_rx_i", CLK_SMUX2_GBE0_RXCLK, 11, 9, 5, 25,
329 BUS_MSTOP(8, BIT(5)), 1),
331 BUS_MSTOP(8, BIT(5)), 1),
333 BUS_MSTOP(8, BIT(5)), 1),
335 BUS_MSTOP(8, BIT(5))),
337 BUS_MSTOP(8, BIT(5))),
339 BUS_MSTOP(8, BIT(6)), 1),
341 BUS_MSTOP(8, BIT(6)), 1),
343 BUS_MSTOP(8, BIT(6)), 1),
345 BUS_MSTOP(8, BIT(6)), 1),
347 BUS_MSTOP(8, BIT(6))),
349 BUS_MSTOP(8, BIT(6))),
351 BUS_MSTOP(9, BIT(4))),
353 BUS_MSTOP(9, BIT(4))),
355 BUS_MSTOP(9, BIT(4))),
357 BUS_MSTOP(9, BIT(5))),
359 BUS_MSTOP(9, BIT(5))),
361 BUS_MSTOP(9, BIT(5))),
363 BUS_MSTOP(9, BIT(6))),
364 DEF_MOD_NO_PM("cru_2_vclk", CLK_PLLVDO_CRU2, 13, 9, 6, 25,
365 BUS_MSTOP(9, BIT(6))),
367 BUS_MSTOP(9, BIT(6))),
369 BUS_MSTOP(9, BIT(7))),
371 BUS_MSTOP(9, BIT(7))),
373 BUS_MSTOP(9, BIT(7))),
375 BUS_MSTOP(3, BIT(4))),
377 BUS_MSTOP(3, BIT(4))),
379 BUS_MSTOP(3, BIT(4))),
390 DEF_RST(3, 8, 1, 9), /* GIC_0_GICRESET_N */
391 DEF_RST(3, 9, 1, 10), /* GIC_0_DBG_GICRESET_N */
403 DEF_RST(7, 8, 3, 9), /* WDT_3_RESET */
410 DEF_RST(9, 5, 4, 6), /* SCIF_0_RST_SYSTEM_N */
411 DEF_RST(9, 6, 4, 7), /* I3C_0_PRESETN */
412 DEF_RST(9, 7, 4, 8), /* I3C_0_TRESETN */
413 DEF_RST(9, 8, 4, 9), /* RIIC_0_MRST */
414 DEF_RST(9, 9, 4, 10), /* RIIC_1_MRST */
415 DEF_RST(9, 10, 4, 11), /* RIIC_2_MRST */
416 DEF_RST(9, 11, 4, 12), /* RIIC_3_MRST */
417 DEF_RST(9, 12, 4, 13), /* RIIC_4_MRST */
418 DEF_RST(9, 13, 4, 14), /* RIIC_5_MRST */
419 DEF_RST(9, 14, 4, 15), /* RIIC_6_MRST */
420 DEF_RST(9, 15, 4, 16), /* RIIC_7_MRST */
426 DEF_RST(10, 9, 4, 26), /* SDHI_2_IXRST */
437 DEF_RST(12, 9, 5, 26), /* CRU_1_ARESETN */