Lines Matching refs:_ns
92 #define CLK_AIF_OSR_SRC(prefix, _ns, _md) \ argument
94 .ns_reg = _ns, \
114 .enable_reg = _ns, \
126 #define CLK_AIF_OSR_CLK(prefix, _ns, hr, en_bit) \ argument
132 .enable_reg = _ns, \
146 #define CLK_AIF_OSR_DIV_CLK(prefix, _ns, _width) \ argument
148 .reg = _ns, \
163 #define CLK_AIF_OSR_BIT_DIV_CLK(prefix, _ns, hr, en_bit) \ argument
169 .enable_reg = _ns, \
183 #define CLK_AIF_OSR_BIT_CLK(prefix, _ns, _shift) \ argument
185 .reg = _ns, \
209 #define CLK_AIF_OSR_DIV(prefix, _ns, _md, hr) \ argument
210 CLK_AIF_OSR_SRC(prefix, _ns, _md) \
211 CLK_AIF_OSR_CLK(prefix, _ns, hr, 21) \
212 CLK_AIF_OSR_DIV_CLK(prefix, _ns, 8) \
213 CLK_AIF_OSR_BIT_DIV_CLK(prefix, _ns, hr, 19) \
214 CLK_AIF_OSR_BIT_CLK(prefix, _ns, 18)