92 #define CLK_AIF_OSR_SRC(prefix, _ns, _md)			\  argument
93 static struct clk_rcg prefix##_osr_src = {			\
117 			.name = #prefix "_osr_src",		\
126 #define CLK_AIF_OSR_CLK(prefix, _ns, hr, en_bit)		\  argument
127 static struct clk_branch prefix##_osr_clk = {			\
135 			.name = #prefix "_osr_clk",		\
137 				&prefix##_osr_src.clkr.hw,	\
146 #define CLK_AIF_OSR_DIV_CLK(prefix, _ns, _width)		\  argument
147 static struct clk_regmap_div prefix##_div_clk = {		\
153 			.name = #prefix "_div_clk",		\
155 				&prefix##_osr_src.clkr.hw,	\
163 #define CLK_AIF_OSR_BIT_DIV_CLK(prefix, _ns, hr, en_bit)	\  argument
164 static struct clk_branch prefix##_bit_div_clk = {		\
172 			.name = #prefix "_bit_div_clk",		\
174 				&prefix##_div_clk.clkr.hw,	\
183 #define CLK_AIF_OSR_BIT_CLK(prefix, _ns, _shift)		\  argument
184 static struct clk_regmap_mux prefix##_bit_clk = {		\
190 			.name = #prefix "_bit_clk",		\
192 				{ .hw = &prefix##_bit_div_clk.clkr.hw, }, \
193 				{ .fw_name = #prefix "_codec_clk", \
194 				  .name = #prefix "_codec_clk", }, \
209 #define CLK_AIF_OSR_DIV(prefix, _ns, _md, hr)			\  argument
210 	CLK_AIF_OSR_SRC(prefix, _ns, _md)			\
211 	CLK_AIF_OSR_CLK(prefix, _ns, hr, 21)			\
212 	CLK_AIF_OSR_DIV_CLK(prefix, _ns, 8)			\
213 	CLK_AIF_OSR_BIT_DIV_CLK(prefix, _ns, hr, 19)		\
214 	CLK_AIF_OSR_BIT_CLK(prefix, _ns, 18)