Lines Matching full:clkdiv
25 struct clkdiv {
34 static inline struct clkdiv *to_clkdiv(struct clk_hw *hw)
36 return container_of(hw, struct clkdiv, hw);
52 static bool is_spmi_pmic_clkdiv_enabled(struct clkdiv *clkdiv)
56 regmap_read(clkdiv->regmap, clkdiv->base + REG_EN_CTL, &val);
62 __spmi_pmic_clkdiv_set_enable_state(struct clkdiv *clkdiv, bool enable,
66 unsigned int ns = clkdiv->cxo_period_ns;
69 ret = regmap_update_bits(clkdiv->regmap, clkdiv->base + REG_EN_CTL,
82 static int spmi_pmic_clkdiv_set_enable_state(struct clkdiv *clkdiv, bool enable)
86 regmap_read(clkdiv->regmap, clkdiv->base + REG_DIV_CTL1, &div_factor);
89 return __spmi_pmic_clkdiv_set_enable_state(clkdiv, enable, div_factor);
94 struct clkdiv *clkdiv = to_clkdiv(hw);
98 spin_lock_irqsave(&clkdiv->lock, flags);
99 ret = spmi_pmic_clkdiv_set_enable_state(clkdiv, true);
100 spin_unlock_irqrestore(&clkdiv->lock, flags);
107 struct clkdiv *clkdiv = to_clkdiv(hw);
110 spin_lock_irqsave(&clkdiv->lock, flags);
111 spmi_pmic_clkdiv_set_enable_state(clkdiv, false);
112 spin_unlock_irqrestore(&clkdiv->lock, flags);
130 struct clkdiv *clkdiv = to_clkdiv(hw);
133 regmap_read(clkdiv->regmap, clkdiv->base + REG_DIV_CTL1, &div_factor);
142 struct clkdiv *clkdiv = to_clkdiv(hw);
147 guard(spinlock_irqsave)(&clkdiv->lock);
149 enabled = is_spmi_pmic_clkdiv_enabled(clkdiv);
151 ret = spmi_pmic_clkdiv_set_enable_state(clkdiv, false);
156 ret = regmap_update_bits(clkdiv->regmap, clkdiv->base + REG_DIV_CTL1,
162 ret = __spmi_pmic_clkdiv_set_enable_state(clkdiv, true,
177 struct clkdiv clks[] __counted_by(nclks);
199 struct clkdiv *clkdiv;
251 for (i = 0, clkdiv = cc->clks; i < nclks; i++) {
254 spin_lock_init(&clkdiv[i].lock);
255 clkdiv[i].base = start + i * 0x100;
256 clkdiv[i].regmap = regmap;
257 clkdiv[i].cxo_period_ns = NSEC_PER_SEC / cxo_hz;
258 clkdiv[i].hw.init = &init;
260 ret = devm_clk_hw_register(dev, &clkdiv[i].hw);
269 { .compatible = "qcom,spmi-clkdiv" },
276 .name = "qcom,spmi-pmic-clkdiv",
283 MODULE_DESCRIPTION("QCOM SPMI PMIC clkdiv driver");