Lines Matching +full:rpmh +full:- +full:based
1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
6 #include <linux/clk-provider.h>
12 #include <soc/qcom/cmd-db.h>
13 #include <soc/qcom/rpmh.h>
16 #include <dt-bindings/clock/qcom,rpmh.h>
22 * struct bcm_db - Auxiliary data pertaining to each Bus Clock Manager(BCM)
23 * @unit: divisor used to convert Hz value to an RPMh msg
24 * @width: multiplier used to convert Hz value to an RPMh msg
36 * struct clk_rpmh - individual rpmh clock data structure
37 * @hw: handle between common and hardware-specific interfaces
38 * @res_name: resource name for the rpmh clock
40 * @res_addr: base address of the rpmh resource within the RPMh
41 * @res_on_val: rpmh clock enable value
42 * @state: rpmh clock requested state
43 * @aggr_state: rpmh clock aggregated state
44 * @last_sent_aggr_state: rpmh clock last aggr state sent to RPMh
45 * @valid_state_mask: mask to determine the state of the rpmh clock
46 * @unit: divisor to convert rate to rpmh msg in magnitudes of Khz
48 * @peer: pointer to the clock rpmh sibling
139 return (c->last_sent_aggr_state & BIT(state)) in has_state_changed()
140 != (c->aggr_state & BIT(state)); in has_state_changed()
147 return rpmh_write(c->dev, state, cmd, 1); in clk_rpmh_send()
149 return rpmh_write_async(c->dev, state, cmd, 1); in clk_rpmh_send()
160 cmd.addr = c->res_addr; in clk_rpmh_send_aggregate_command()
161 cmd_state = c->aggr_state; in clk_rpmh_send_aggregate_command()
162 on_val = c->res_on_val; in clk_rpmh_send_aggregate_command()
172 dev_err(c->dev, "set %s state of %s failed: (%d)\n", in clk_rpmh_send_aggregate_command()
175 "wake" : "active", c->res_name, ret); in clk_rpmh_send_aggregate_command()
181 c->last_sent_aggr_state = c->aggr_state; in clk_rpmh_send_aggregate_command()
182 c->peer->last_sent_aggr_state = c->last_sent_aggr_state; in clk_rpmh_send_aggregate_command()
188 * Update state and aggregate state values based on enable value.
195 c->state = enable ? c->valid_state_mask : 0; in clk_rpmh_aggregate_state_send_command()
196 c->aggr_state = c->state | c->peer->state; in clk_rpmh_aggregate_state_send_command()
197 c->peer->aggr_state = c->aggr_state; in clk_rpmh_aggregate_state_send_command()
204 c->state = 0; in clk_rpmh_aggregate_state_send_command()
206 c->state = c->valid_state_mask; in clk_rpmh_aggregate_state_send_command()
208 WARN(1, "clk: %s failed to %s\n", c->res_name, in clk_rpmh_aggregate_state_send_command()
240 * RPMh clocks have a fixed rate. Return static rate. in clk_rpmh_recalc_rate()
242 return prate / r->div; in clk_rpmh_recalc_rate()
260 if (c->aggr_state) in clk_rpmh_bcm_send_cmd()
261 cmd_state = c->aggr_state; in clk_rpmh_bcm_send_cmd()
268 if (c->last_sent_aggr_state != cmd_state) { in clk_rpmh_bcm_send_cmd()
269 cmd.addr = c->res_addr; in clk_rpmh_bcm_send_cmd()
273 * Send only an active only state request. RPMh continues to in clk_rpmh_bcm_send_cmd()
279 dev_err(c->dev, "set active state of %s failed: (%d)\n", in clk_rpmh_bcm_send_cmd()
280 c->res_name, ret); in clk_rpmh_bcm_send_cmd()
282 c->last_sent_aggr_state = cmd_state; in clk_rpmh_bcm_send_cmd()
310 c->aggr_state = rate / c->unit; in clk_rpmh_bcm_set_rate()
312 * Since any non-zero value sent to hw would result in enabling the in clk_rpmh_bcm_set_rate()
332 return c->aggr_state * c->unit; in clk_rpmh_bcm_recalc_rate()
343 /* Resource name must match resource id present in cmd-db */
664 * The clka3 RPMh resource is missing in cmd-db
813 struct clk_rpmh_desc *rpmh = data; in of_clk_rpmh_hw_get() local
814 unsigned int idx = clkspec->args[0]; in of_clk_rpmh_hw_get()
816 if (idx >= rpmh->num_clks) { in of_clk_rpmh_hw_get()
818 return ERR_PTR(-EINVAL); in of_clk_rpmh_hw_get()
821 return rpmh->clks[idx]; in of_clk_rpmh_hw_get()
831 desc = of_device_get_match_data(&pdev->dev); in clk_rpmh_probe()
833 return -ENODEV; in clk_rpmh_probe()
835 hw_clks = desc->clks; in clk_rpmh_probe()
837 for (i = 0; i < desc->num_clks; i++) { in clk_rpmh_probe()
846 name = hw_clks[i]->init->name; in clk_rpmh_probe()
849 res_addr = cmd_db_read_addr(rpmh_clk->res_name); in clk_rpmh_probe()
851 dev_err(&pdev->dev, "missing RPMh resource address for %s\n", in clk_rpmh_probe()
852 rpmh_clk->res_name); in clk_rpmh_probe()
853 return -ENODEV; in clk_rpmh_probe()
856 data = cmd_db_read_aux_data(rpmh_clk->res_name, &aux_data_len); in clk_rpmh_probe()
859 dev_err(&pdev->dev, in clk_rpmh_probe()
860 "error reading RPMh aux data for %s (%d)\n", in clk_rpmh_probe()
861 rpmh_clk->res_name, ret); in clk_rpmh_probe()
867 rpmh_clk->unit = le32_to_cpu(data->unit) * 1000ULL; in clk_rpmh_probe()
869 rpmh_clk->res_addr += res_addr; in clk_rpmh_probe()
870 rpmh_clk->dev = &pdev->dev; in clk_rpmh_probe()
872 ret = devm_clk_hw_register(&pdev->dev, hw_clks[i]); in clk_rpmh_probe()
874 dev_err(&pdev->dev, "failed to register %s\n", name); in clk_rpmh_probe()
880 ret = devm_of_clk_add_hw_provider(&pdev->dev, of_clk_rpmh_hw_get, in clk_rpmh_probe()
883 dev_err(&pdev->dev, "Failed to add clock provider\n"); in clk_rpmh_probe()
887 dev_dbg(&pdev->dev, "Registered RPMh clocks\n"); in clk_rpmh_probe()
893 { .compatible = "qcom,qdu1000-rpmh-clk", .data = &clk_rpmh_qdu1000},
894 { .compatible = "qcom,sa8775p-rpmh-clk", .data = &clk_rpmh_sa8775p},
895 { .compatible = "qcom,sar2130p-rpmh-clk", .data = &clk_rpmh_sar2130p},
896 { .compatible = "qcom,sc7180-rpmh-clk", .data = &clk_rpmh_sc7180},
897 { .compatible = "qcom,sc8180x-rpmh-clk", .data = &clk_rpmh_sc8180x},
898 { .compatible = "qcom,sc8280xp-rpmh-clk", .data = &clk_rpmh_sc8280xp},
899 { .compatible = "qcom,sdm845-rpmh-clk", .data = &clk_rpmh_sdm845},
900 { .compatible = "qcom,sdm670-rpmh-clk", .data = &clk_rpmh_sdm670},
901 { .compatible = "qcom,sdx55-rpmh-clk", .data = &clk_rpmh_sdx55},
902 { .compatible = "qcom,sdx65-rpmh-clk", .data = &clk_rpmh_sdx65},
903 { .compatible = "qcom,sdx75-rpmh-clk", .data = &clk_rpmh_sdx75},
904 { .compatible = "qcom,sm4450-rpmh-clk", .data = &clk_rpmh_sm4450},
905 { .compatible = "qcom,sm6350-rpmh-clk", .data = &clk_rpmh_sm6350},
906 { .compatible = "qcom,sm8150-rpmh-clk", .data = &clk_rpmh_sm8150},
907 { .compatible = "qcom,sm8250-rpmh-clk", .data = &clk_rpmh_sm8250},
908 { .compatible = "qcom,sm8350-rpmh-clk", .data = &clk_rpmh_sm8350},
909 { .compatible = "qcom,sm8450-rpmh-clk", .data = &clk_rpmh_sm8450},
910 { .compatible = "qcom,sm8550-rpmh-clk", .data = &clk_rpmh_sm8550},
911 { .compatible = "qcom,sm8650-rpmh-clk", .data = &clk_rpmh_sm8650},
912 { .compatible = "qcom,sc7280-rpmh-clk", .data = &clk_rpmh_sc7280},
913 { .compatible = "qcom,x1e80100-rpmh-clk", .data = &clk_rpmh_x1e80100},
921 .name = "clk-rpmh",
938 MODULE_DESCRIPTION("QCOM RPMh Clock Driver");