Lines Matching full:regmap
10 #include <linux/regmap.h>
389 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);
395 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);
434 static void clk_alpha_pll_write_config(struct regmap *regmap, unsigned int reg,
438 regmap_write(regmap, reg, val);
441 void clk_alpha_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,
446 regmap_write(regmap, PLL_L_VAL(pll), config->l);
447 regmap_write(regmap, PLL_ALPHA_VAL(pll), config->alpha);
448 regmap_write(regmap, PLL_CONFIG_CTL(pll), config->config_ctl_val);
451 regmap_write(regmap, PLL_CONFIG_CTL_U(pll),
455 regmap_write(regmap, PLL_ALPHA_VAL_U(pll), config->alpha_hi);
477 regmap_update_bits(regmap, PLL_USER_CTL(pll), mask, val);
480 regmap_update_bits(regmap, PLL_TEST_CTL(pll),
484 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll),
488 regmap_update_bits(regmap, PLL_TEST_CTL_U(pll),
492 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll),
496 qcom_pll_set_fsm_mode(regmap, PLL_MODE(pll), 6, 0);
506 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);
515 ret = regmap_write(pll->clkr.regmap, PLL_MODE(pll), val);
531 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);
536 ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll),
547 ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll),
561 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);
585 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);
601 ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll),
613 ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll),
622 ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll),
636 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);
647 regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), mask, 0);
654 regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), mask, 0);
712 regmap_read(pll->clkr.regmap, PLL_L_VAL(pll), &l);
714 regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl);
716 regmap_read(pll->clkr.regmap, PLL_ALPHA_VAL(pll), &low);
718 regmap_read(pll->clkr.regmap, PLL_ALPHA_VAL_U(pll),
738 regmap_read(pll->clkr.regmap, PLL_MODE(pll), &mode);
741 regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_UPDATE,
759 regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_UPDATE, 0);
803 regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);
809 regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL_U(pll), a >> 32);
811 regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a);
814 regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),
819 regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),
857 void clk_huayra_2290_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,
862 clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll), config->config_ctl_val);
863 clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll), config->config_ctl_hi_val);
864 clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U1(pll), config->config_ctl_hi1_val);
865 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll), config->test_ctl_val);
866 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll), config->test_ctl_hi_val);
867 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U1(pll), config->test_ctl_hi1_val);
868 clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), config->l);
869 clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha);
870 clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll), config->user_ctl_val);
873 regmap_update_bits(regmap, PLL_MODE(pll), PLL_BYPASSNL, PLL_BYPASSNL);
874 regmap_read(regmap, PLL_MODE(pll), &val);
880 regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);
881 regmap_read(regmap, PLL_MODE(pll), &val);
887 regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, PLL_OUTCTRL);
945 regmap_read(pll->clkr.regmap, PLL_L_VAL(pll), &l);
946 regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl);
949 regmap_read(pll->clkr.regmap, PLL_ALPHA_VAL(pll), &alpha);
1000 regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl);
1003 regmap_read(pll->clkr.regmap, PLL_ALPHA_VAL(pll), &cur_alpha);
1016 regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);
1022 regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);
1023 regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a);
1026 regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),
1029 regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),
1044 struct regmap *regmap)
1049 ret = regmap_read(regmap, PLL_MODE(pll), &mode_val);
1050 ret |= regmap_read(regmap, PLL_OPMODE(pll), &opmode_val);
1061 return trion_pll_is_enabled(pll, pll->clkr.regmap);
1067 struct regmap *regmap = pll->clkr.regmap;
1071 ret = regmap_read(regmap, PLL_MODE(pll), &val);
1084 regmap_write(regmap, PLL_OPMODE(pll), PLL_RUN);
1091 ret = regmap_update_bits(regmap, PLL_USER_CTL(pll),
1097 return regmap_update_bits(regmap, PLL_MODE(pll),
1104 struct regmap *regmap = pll->clkr.regmap;
1108 ret = regmap_read(regmap, PLL_MODE(pll), &val);
1119 ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);
1124 ret = regmap_update_bits(regmap, PLL_USER_CTL(pll),
1130 regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);
1131 regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);
1140 regmap_read(pll->clkr.regmap, PLL_L_VAL(pll), &l);
1141 regmap_read(pll->clkr.regmap, PLL_ALPHA_VAL(pll), &frac);
1199 regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl);
1246 regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl);
1267 return regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),
1285 void clk_fabia_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,
1290 clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), config->l);
1291 clk_alpha_pll_write_config(regmap, PLL_FRAC(pll), config->alpha);
1292 clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll),
1294 clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll),
1296 clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll),
1298 clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U(pll),
1300 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll),
1302 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll),
1308 regmap_update_bits(regmap, PLL_USER_CTL(pll), mask, val);
1312 regmap_update_bits(regmap, PLL_MODE(pll), PLL_FSM_LEGACY_MODE,
1315 regmap_update_bits(regmap, PLL_MODE(pll), PLL_UPDATE_BYPASS,
1318 regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);
1327 struct regmap *regmap = pll->clkr.regmap;
1329 ret = regmap_read(regmap, PLL_MODE(pll), &val);
1341 ret = regmap_read(regmap, PLL_OPMODE(pll), &opmode_val);
1349 ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);
1353 ret = regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);
1357 ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N,
1362 ret = regmap_write(regmap, PLL_OPMODE(pll), PLL_RUN);
1370 ret = regmap_update_bits(regmap, PLL_USER_CTL(pll),
1375 return regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL,
1384 struct regmap *regmap = pll->clkr.regmap;
1386 ret = regmap_read(regmap, PLL_MODE(pll), &val);
1396 ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);
1401 ret = regmap_update_bits(regmap, PLL_USER_CTL(pll), PLL_OUT_MASK, 0);
1406 regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);
1415 regmap_read(pll->clkr.regmap, PLL_L_VAL(pll), &l);
1416 regmap_read(pll->clkr.regmap, PLL_FRAC(pll), &frac);
1454 regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);
1455 regmap_write(pll->clkr.regmap, PLL_FRAC(pll), a);
1472 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);
1501 regmap_write(pll->clkr.regmap, PLL_CAL_L_VAL(pll), cal_l);
1542 ret = regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &val);
1563 struct regmap *regmap = pll->clkr.regmap;
1566 regmap_read(regmap, PLL_USER_CTL(pll), &val);
1596 struct regmap *regmap = pll->clkr.regmap;
1607 return regmap_update_bits(regmap, PLL_USER_CTL(pll),
1638 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);
1653 return regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),
1669 * @regmap: register map
1672 void clk_trion_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,
1679 if (trion_pll_is_enabled(pll, regmap)) {
1684 clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), config->l);
1685 regmap_write(regmap, PLL_CAL_L_VAL(pll), TRION_PLL_CAL_VAL);
1686 clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha);
1687 clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll),
1689 clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll),
1691 clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U1(pll),
1693 clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll),
1695 clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U(pll),
1697 clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U1(pll),
1699 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll),
1701 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll),
1703 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U1(pll),
1706 regmap_update_bits(regmap, PLL_MODE(pll), PLL_UPDATE_BYPASS,
1710 regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);
1713 regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);
1716 regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);
1731 regmap_read(pll->clkr.regmap, PLL_STATUS(pll), &val);
1768 regmap_update_bits(pll->clkr.regmap, PLL_L_VAL(pll), LUCID_EVO_PLL_L_VAL_MASK, l);
1769 regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a);
1772 ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), latch_bit, latch_bit);
1778 regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);
1785 ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), latch_bit, 0);
1835 void clk_agera_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,
1838 clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), config->l);
1839 clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha);
1840 clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll),
1842 clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll),
1844 clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll),
1846 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll),
1848 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll),
1868 regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);
1869 regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a);
1891 * @regmap: register map
1894 void clk_lucid_5lpe_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,
1901 if (trion_pll_is_enabled(pll, regmap)) {
1906 clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), config->l);
1907 regmap_write(regmap, PLL_CAL_L_VAL(pll), TRION_PLL_CAL_VAL);
1908 clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha);
1909 clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll),
1911 clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll),
1913 clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U1(pll),
1915 clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll),
1917 clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U(pll),
1919 clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U1(pll),
1921 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll),
1923 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll),
1925 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U1(pll),
1929 regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);
1932 regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);
1935 regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);
1945 ret = regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &val);
1958 if (trion_pll_is_enabled(pll, pll->clkr.regmap))
1961 ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);
1965 regmap_write(pll->clkr.regmap, PLL_OPMODE(pll), PLL_RUN);
1972 ret = regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll), PLL_OUT_MASK, PLL_OUT_MASK);
1977 return regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_OUTCTRL, PLL_OUTCTRL);
1986 ret = regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &val);
1997 ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);
2002 ret = regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll), PLL_OUT_MASK, 0);
2007 regmap_write(pll->clkr.regmap, PLL_OPMODE(pll), PLL_STANDBY);
2022 regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);
2052 struct regmap *regmap = pll->clkr.regmap;
2060 ret = regmap_read(regmap, PLL_USER_CTL(pll), &val);
2082 return regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),
2119 void clk_zonda_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,
2122 clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), config->l);
2123 clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha);
2124 clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll), config->config_ctl_val);
2125 clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll), config->config_ctl_hi_val);
2126 clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U1(pll), config->config_ctl_hi1_val);
2127 clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll), config->user_ctl_val);
2128 clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U(pll), config->user_ctl_hi_val);
2129 clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U1(pll), config->user_ctl_hi1_val);
2130 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll), config->test_ctl_val);
2131 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll), config->test_ctl_hi_val);
2132 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U1(pll), config->test_ctl_hi1_val);
2134 regmap_update_bits(regmap, PLL_MODE(pll), PLL_BYPASSNL, 0);
2137 regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);
2140 regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);
2143 regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);
2150 struct regmap *regmap = pll->clkr.regmap;
2154 regmap_read(regmap, PLL_MODE(pll), &val);
2165 regmap_update_bits(regmap, PLL_MODE(pll), PLL_BYPASSNL, PLL_BYPASSNL);
2173 regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);
2176 regmap_write(regmap, PLL_OPMODE(pll), PLL_RUN);
2178 regmap_read(regmap, PLL_TEST_CTL(pll), &val);
2189 regmap_update_bits(regmap, PLL_USER_CTL(pll), ZONDA_PLL_OUT_MASK, ZONDA_PLL_OUT_MASK);
2192 regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, PLL_OUTCTRL);
2200 struct regmap *regmap = pll->clkr.regmap;
2203 regmap_read(regmap, PLL_MODE(pll), &val);
2212 regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);
2215 regmap_update_bits(regmap, PLL_USER_CTL(pll), ZONDA_PLL_OUT_MASK, 0);
2218 regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N | PLL_BYPASSNL, 0);
2221 regmap_write(regmap, PLL_OPMODE(pll), 0x0);
2253 regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a);
2254 regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);
2263 regmap_read(pll->clkr.regmap, PLL_TEST_CTL(pll), &test_ctl_val);
2288 void clk_lucid_evo_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,
2297 if (trion_pll_is_enabled(pll, regmap)) {
2303 clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), lval);
2304 clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha);
2305 clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll), config->config_ctl_val);
2306 clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll), config->config_ctl_hi_val);
2307 clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U1(pll), config->config_ctl_hi1_val);
2308 clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll), config->user_ctl_val);
2309 clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U(pll), config->user_ctl_hi_val);
2310 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll), config->test_ctl_val);
2311 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll), config->test_ctl_hi_val);
2312 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U1(pll), config->test_ctl_hi1_val);
2313 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U2(pll), config->test_ctl_hi2_val);
2316 regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);
2319 regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);
2320 regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);
2324 void clk_lucid_ole_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,
2331 clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), lval);
2332 clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha);
2333 clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll), config->config_ctl_val);
2334 clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll), config->config_ctl_hi_val);
2335 clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U1(pll), config->config_ctl_hi1_val);
2336 clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll), config->user_ctl_val);
2337 clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U(pll), config->user_ctl_hi_val);
2338 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll), config->test_ctl_val);
2339 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll), config->test_ctl_hi_val);
2340 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U1(pll), config->test_ctl_hi1_val);
2341 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U2(pll), config->test_ctl_hi2_val);
2344 regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);
2347 regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);
2348 regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);
2355 struct regmap *regmap = pll->clkr.regmap;
2359 ret = regmap_read(regmap, PLL_USER_CTL(pll), &val);
2372 if (trion_pll_is_enabled(pll, regmap))
2375 ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);
2380 regmap_write(regmap, PLL_OPMODE(pll), PLL_RUN);
2387 ret = regmap_update_bits(regmap, PLL_USER_CTL(pll), PLL_OUT_MASK, PLL_OUT_MASK);
2392 ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, PLL_OUTCTRL);
2404 struct regmap *regmap = pll->clkr.regmap;
2408 ret = regmap_read(regmap, PLL_USER_CTL(pll), &val);
2419 ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);
2424 ret = regmap_update_bits(regmap, PLL_USER_CTL(pll), PLL_OUT_MASK, 0);
2429 regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);
2432 regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, 0);
2443 regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);
2484 struct regmap *regmap = pll->clkr.regmap;
2487 regmap_read(regmap, PLL_L_VAL(pll), &l);
2489 regmap_read(regmap, PLL_ALPHA_VAL(pll), &frac);
2541 struct regmap *regmap = pll->clkr.regmap;
2545 regmap_write(regmap, PLL_OPMODE(pll), PLL_RUN);
2546 regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);
2547 regmap_update_bits(regmap, PLL_MODE(pll), PONGO_XO_PRESENT, PONGO_XO_PRESENT);
2549 /* Set regmap for wait_for_pll() */
2550 pll->clkr.regmap = regmap;
2554 regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);
2559 regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);
2562 regmap_update_bits(regmap, PLL_MODE(pll), PONGO_CLOCK_SELECT,
2571 struct regmap *regmap = pll->clkr.regmap;
2575 if (trion_pll_is_enabled(pll, regmap))
2578 ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);
2583 regmap_write(regmap, PLL_OPMODE(pll), PLL_RUN);
2590 ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, PLL_OUTCTRL);
2603 struct regmap *regmap = pll->clkr.regmap;
2607 ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);
2612 regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);
2619 struct regmap *regmap = pll->clkr.regmap;
2622 if (regmap_read(regmap, PLL_L_VAL(pll), &l))
2639 struct regmap *regmap,
2644 regmap_update_bits(regmap, PLL_USER_CTL(pll), PONGO_PLL_OUT_MASK,
2647 if (trion_pll_is_enabled(pll, regmap))
2650 if (regmap_read(regmap, PLL_L_VAL(pll), &val))
2656 clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), config->l);
2657 clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha);
2658 clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll), config->config_ctl_val);
2659 clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll), config->config_ctl_hi_val);
2660 clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U1(pll), config->config_ctl_hi1_val);
2661 clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U2(pll), config->config_ctl_hi2_val);
2662 clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll),
2664 clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U(pll), config->user_ctl_hi_val);
2665 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll), config->test_ctl_val);
2666 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll), config->test_ctl_hi_val);
2667 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U1(pll), config->test_ctl_hi1_val);
2668 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U2(pll), config->test_ctl_hi2_val);
2669 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U3(pll), config->test_ctl_hi3_val);
2672 regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);
2676 void clk_rivian_evo_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,
2679 clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll), config->config_ctl_val);
2680 clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll), config->config_ctl_hi_val);
2681 clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U1(pll), config->config_ctl_hi1_val);
2682 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll), config->test_ctl_val);
2683 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll), config->test_ctl_hi_val);
2684 clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), config->l);
2685 clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll), config->user_ctl_val);
2686 clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U(pll), config->user_ctl_hi_val);
2688 regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);
2690 regmap_update_bits(regmap, PLL_MODE(pll),
2702 regmap_read(pll->clkr.regmap, PLL_L_VAL(pll), &l);
2734 void clk_stromer_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,
2739 regmap_write(regmap, PLL_L_VAL(pll), config->l);
2740 regmap_write(regmap, PLL_ALPHA_VAL(pll), config->alpha);
2741 regmap_write(regmap, PLL_CONFIG_CTL(pll), config->config_ctl_val);
2744 regmap_write(regmap, PLL_CONFIG_CTL_U(pll),
2748 regmap_write(regmap, PLL_ALPHA_VAL_U(pll), config->alpha_hi);
2770 regmap_update_bits(regmap, PLL_USER_CTL(pll), mask, val);
2779 regmap_update_bits(regmap, PLL_USER_CTL_U(pll), mask_u, val_u);
2780 regmap_write(regmap, PLL_TEST_CTL(pll), config->test_ctl_val);
2781 regmap_write(regmap, PLL_TEST_CTL_U(pll), config->test_ctl_hi_val);
2784 qcom_pll_set_fsm_mode(regmap, PLL_MODE(pll), 6, 0);
2810 regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);
2813 regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a);
2814 regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL_U(pll),
2817 regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),
2828 regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_UPDATE,
2859 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &pll_mode);
2863 regmap_write(pll->clkr.regmap, PLL_MODE(pll), 0);
2868 regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);
2873 regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a);
2874 regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL_U(pll),
2877 regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),
2880 regmap_write(pll->clkr.regmap, PLL_MODE(pll), PLL_BYPASSNL);
2884 regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_RESET_N,
2898 regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_OUTCTRL,
2914 void clk_regera_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,
2917 clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), config->l);
2918 clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha);
2919 clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll), config->config_ctl_val);
2920 clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll), config->config_ctl_hi_val);
2921 clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U1(pll), config->config_ctl_hi1_val);
2922 clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll), config->user_ctl_val);
2923 clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U(pll), config->user_ctl_hi_val);
2924 clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U1(pll), config->user_ctl_hi1_val);
2925 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll), config->test_ctl_val);
2926 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll), config->test_ctl_hi_val);
2927 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U1(pll), config->test_ctl_hi1_val);
2930 regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);