Lines Matching defs:prate

660 alpha_pll_calc_rate(u64 prate, u32 l, u32 a, u32 alpha_width)
662 	return (prate * l) + ((prate * a) >> ALPHA_SHIFT(alpha_width));
666 alpha_pll_round_rate(unsigned long rate, unsigned long prate, u32 *l, u64 *a,
673 	remainder = do_div(quotient, prate);
684 	remainder = do_div(quotient, prate);
690 	return alpha_pll_calc_rate(prate, *l, *a, alpha_width);
710 	u64 a = 0, prate = parent_rate;
736 	return alpha_pll_calc_rate(prate, l, a, alpha_width);
817 				    unsigned long prate,
825 	rate = alpha_pll_round_rate(rate, prate, &l, &a, alpha_width);
839 				  unsigned long prate)
841 	return __clk_alpha_pll_set_rate(hw, rate, prate,
846 					unsigned long prate)
848 	return __clk_alpha_pll_set_rate(hw, rate, prate,
853 				     unsigned long *prate)
860 	rate = alpha_pll_round_rate(rate, *prate, &l, &a, alpha_width);
905 alpha_huayra_pll_calc_rate(u64 prate, u32 l, u32 a)
914 	return (prate * l) + (prate * a >> PLL_HUAYRA_ALPHA_WIDTH);
918 alpha_huayra_pll_round_rate(unsigned long rate, unsigned long prate,
925 	remainder = do_div(quotient, prate);
934 	remainder = do_div(quotient, prate);
948 	return alpha_huayra_pll_calc_rate(prate, *l, *a);
1009 				     unsigned long prate)
1014 	rate = alpha_huayra_pll_round_rate(rate, prate, &l, &a);
1052 					unsigned long *prate)
1056 	return alpha_huayra_pll_round_rate(rate, *prate, &l, &a);
1245 				 unsigned long *prate)
1255 	return divider_round_rate(hw, rate, prate, table,
1261 				    unsigned long *prate)
1273 		*prate = clk_hw_round_rate(clk_hw_get_parent(hw), div * rate);
1275 	return DIV_ROUND_UP_ULL((u64)*prate, div);
1463 						unsigned long prate)
1471 	rrate = alpha_pll_round_rate(rate, prate, &l, &a, alpha_width);
1607 				 unsigned long *prate)
1611 	return divider_round_rate(hw, rate, prate, pll->post_div_table,
1644 				unsigned long rate, unsigned long *prate)
1648 	return divider_round_rate(hw, rate, prate, pll->post_div_table,
1778 				      unsigned long prate, u32 latch_bit, u32 latch_ack)
1786 	rrate = alpha_pll_round_rate(rate, prate, &l, &a, alpha_width);
1825 				    unsigned long prate)
1827 	return __alpha_pll_trion_set_rate(hw, rate, prate, PLL_UPDATE, ALPHA_PLL_ACK_LATCH);
1878 							unsigned long prate)
1886 	rrate = alpha_pll_round_rate(rate, prate, &l, &a, alpha_width);
2064 					 unsigned long prate)
2066 	return __alpha_pll_trion_set_rate(hw, rate, prate,
2248 static void zonda_pll_adjust_l_val(unsigned long rate, unsigned long prate, u32 *l)
2253 	remainder = do_div(quotient, prate);
2255 	*l = rate + (u32)(remainder * 2 >= prate);
2259 				  unsigned long prate)
2268 	rrate = alpha_pll_round_rate(rate, prate, &l, &a, alpha_width);
2275 		zonda_pll_adjust_l_val(rate, prate, &l);
2736 					  unsigned long *prate)
2743 	rate = alpha_pll_round_rate(rate, *prate, &l, &a, 0);
2829 					  unsigned long prate)
2836 	rate = alpha_pll_round_rate(rate, prate, &l, &a, ALPHA_REG_BITWIDTH);
2878 					       unsigned long prate)
2885 	rate = alpha_pll_round_rate(rate, prate, &l, &a, alpha_width);