Lines Matching +full:pxa3xx +full:- +full:nand +full:- +full:controller
1 // SPDX-License-Identifier: GPL-2.0-only
7 * Heavily inspired from former arch/arm/mach-pxa/pxa3xx.c
9 * For non-devicetree platforms. Once pxa is fully converted to devicetree, this
14 #include <linux/clk-provider.h>
21 #include <dt-bindings/clock/pxa-clock.h>
22 #include "clk-pxa.h"
41 #define ACCR_SMCFS_MASK (0x7 << 23) /* Static Memory Controller Frequency Select */
42 #define ACCR_SFLFS_MASK (0x3 << 18) /* Frequency Select for Internal Memory Controller */
44 #define ACCR_HSS_MASK (0x3 << 14) /* System Bus-Clock Frequency Select */
45 #define ACCR_DMCFS_MASK (0x3 << 12) /* Dynamic Memory Controller Clock Frequency Select */
46 #define ACCR_XN_MASK (0x7 << 8) /* Core PLL Turbo-Mode-to-Run-Mode Ratio */
47 #define ACCR_XL_MASK (0x1f) /* Core PLL Run-Mode-to-Oscillator Ratio */
63 #define CKEN_NAND 4 /* < NAND Flash Controller Clock Enable */
65 #define CKEN_DMC 8 /* < Dynamic Memory Controller clock enable */
66 #define CKEN_SMC 9 /* < Static Memory Controller clock enable */
67 #define CKEN_ISC 10 /* < Internal SRAM Controller clock enable */
71 #define CKEN_KEYPAD 14 /* < Keypand Controller Clock Enable */
90 #define CKEN_INTC 38 /* < Interrupt controller clock enable */
92 #define CKEN_1WIRE 40 /* < 1-wire clock enable */
94 #define CKEN_MINI_IM 48 /* < Mini-IM */
101 #define CKEN_PXA300_GCU 42 /* Graphics controller clock enable */
102 #define CKEN_PXA320_GCU 7 /* Graphics controller clock enable */
119 /* crystal frequency to static memory controller multiplier (SMCFS) */
235 PXA3XX_PBUS_CKEN("pxa2xx-uart.0", NULL, FFUART, 1, 4, 1, 42, 1),
236 PXA3XX_PBUS_CKEN("pxa2xx-uart.1", NULL, BTUART, 1, 4, 1, 42, 1),
237 PXA3XX_PBUS_CKEN("pxa2xx-uart.2", NULL, STUART, 1, 4, 1, 42, 1),
238 PXA3XX_PBUS_CKEN("pxa2xx-i2c.0", NULL, I2C, 2, 5, 1, 19, 0),
239 PXA3XX_PBUS_CKEN("pxa27x-udc", NULL, UDC, 1, 4, 1, 13, 5),
240 PXA3XX_PBUS_CKEN("pxa27x-ohci", NULL, USBH, 1, 4, 1, 13, 0),
241 PXA3XX_PBUS_CKEN("pxa3xx-u2d", NULL, USB2, 1, 4, 1, 13, 0),
242 PXA3XX_PBUS_CKEN("pxa27x-pwm.0", NULL, PWM0, 1, 6, 1, 48, 0),
243 PXA3XX_PBUS_CKEN("pxa27x-pwm.1", NULL, PWM1, 1, 6, 1, 48, 0),
244 PXA3XX_PBUS_CKEN("pxa2xx-mci.0", NULL, MMC1, 1, 4, 1, 24, 0),
245 PXA3XX_PBUS_CKEN("pxa2xx-mci.1", NULL, MMC2, 1, 4, 1, 24, 0),
246 PXA3XX_PBUS_CKEN("pxa2xx-mci.2", NULL, MMC3, 1, 4, 1, 24, 0),
248 PXA3XX_CKEN_1RATE("pxa27x-keypad", NULL, KEYPAD,
250 PXA3XX_CKEN_1RATE("pxa3xx-ssp.0", NULL, SSP1, pxa3xx_13MHz_bus_parents),
251 PXA3XX_CKEN_1RATE("pxa3xx-ssp.1", NULL, SSP2, pxa3xx_13MHz_bus_parents),
252 PXA3XX_CKEN_1RATE("pxa3xx-ssp.2", NULL, SSP3, pxa3xx_13MHz_bus_parents),
253 PXA3XX_CKEN_1RATE("pxa3xx-ssp.3", NULL, SSP4, pxa3xx_13MHz_bus_parents),
259 PXA3XX_CKEN("pxa2xx-fb", NULL, pxa3xx_sbus_parents, 1, 1, 1, 1, LCD,
261 PXA3XX_CKEN("pxa2xx-pcmcia", NULL, pxa3xx_smemcbus_parents, 1, 4,
267 PXA3XX_PBUS_CKEN("pxa3xx-gcu", NULL, PXA300_GCU, 1, 1, 1, 1, 0),
268 PXA3XX_PBUS_CKEN("pxa3xx-nand", NULL, NAND, 1, 2, 1, 4, 0),
269 PXA3XX_CKEN_1RATE("pxa3xx-gpio", NULL, GPIO, pxa3xx_13MHz_bus_parents),
273 PXA3XX_PBUS_CKEN("pxa3xx-nand", NULL, NAND, 1, 2, 1, 6, 0),
274 PXA3XX_PBUS_CKEN("pxa3xx-gcu", NULL, PXA320_GCU, 1, 1, 1, 1, 0),
275 PXA3XX_CKEN_1RATE("pxa3xx-gpio", NULL, GPIO, pxa3xx_13MHz_bus_parents),
280 PXA3XX_PBUS_CKEN("pxa3xx-gcu", NULL, PXA300_GCU, 1, 1, 1, 1, 0),
281 PXA3XX_PBUS_CKEN("pxa3xx-nand", NULL, NAND, 1, 2, 1, 4, 0),
282 PXA3XX_CKEN_1RATE("pxa93x-gpio", NULL, GPIO, pxa3xx_13MHz_bus_parents),
401 DUMMY_CLK(NULL, "pxa93x-gpio", "osc_13mhz"),
402 DUMMY_CLK(NULL, "sa1100-rtc", "osc_32_768khz"),
403 DUMMY_CLK("UARTCLK", "pxa2xx-ir", "STUART"),
404 DUMMY_CLK(NULL, "pxa3xx-pwri2c.1", "osc_13mhz"),
416 name = d->dev_id ? d->dev_id : d->con_id; in pxa3xx_dummy_clocks_init()
417 clk = clk_register_fixed_factor(NULL, name, d->parent, 0, 1, 1); in pxa3xx_dummy_clocks_init()
418 clk_register_clkdev(clk, d->con_id, d->dev_id); in pxa3xx_dummy_clocks_init()
435 clk_register_fixed_factor(NULL, "os-timer0", in pxa3xx_base_clocks_init()
463 CLK_OF_DECLARE(pxa_clks, "marvell,pxa300-clocks", pxa3xx_dt_clocks_init);