Lines Matching full:parents
110 #define PXA27X_CKEN(dev_id, con_id, parents, mult_hp, div_hp, \ argument
112 PXA_CKEN(dev_id, con_id, bit, parents, 1, 1, mult_hp, div_hp, \
118 PARENTS(pxa27x_pbus) = { "osc_13mhz", "ppll_312mhz" };
119 PARENTS(pxa27x_sbus) = { "system_bus", "system_bus" };
120 PARENTS(pxa27x_32Mhz_bus) = { "osc_32_768khz", "osc_32_768khz" };
121 PARENTS(pxa27x_lcd_bus) = { "lcd_base", "lcd_base" };
122 PARENTS(pxa27x_membus) = { "lcd_base", "lcd_base" };
124 #define PXA27X_CKEN_1RATE(dev_id, con_id, bit, parents, delay) \ argument
125 PXA_CKEN_1RATE(dev_id, con_id, bit, parents, \
127 #define PXA27X_CKEN_1RATE_AO(dev_id, con_id, bit, parents, delay) \ argument
128 PXA_CKEN_1RATE(dev_id, con_id, bit, parents, \
245 PARENTS(clk_pxa27x_cpll) = { "osc_13mhz" };
283 PARENTS(clk_pxa27x_lcd_base) = { "osc_13mhz", "run" };
334 PARENTS(clk_pxa27x_core) = { "osc_13mhz", "run", "cpll" };
345 PARENTS(clk_pxa27x_run) = { "cpll" };
389 PARENTS(clk_pxa27x_system_bus) = { "osc_13mhz", "run" };
428 PARENTS(clk_pxa27x_memory) = { "osc_13mhz", "system_bus", "run" };