74 static struct regmap *clk_regmap;  variable
393 	regmap_read(clk_regmap, clk->reg, &val);  in clk_mask_enable()
398 	return regmap_update_bits(clk_regmap, clk->reg,  in clk_mask_enable()
406 	regmap_update_bits(clk_regmap, clk->reg,  in clk_mask_disable()
415 	regmap_read(clk_regmap, clk->reg, &val);  in clk_mask_is_enabled()
431 	regmap_update_bits(clk_regmap, clk->reg, clk->enable, clk->enable);  in clk_pll_enable()
434 		regmap_read(clk_regmap, clk->reg, &val);  in clk_pll_enable()
449 	regmap_update_bits(clk_regmap, clk->reg, clk->enable, 0x0);  in clk_pll_disable()
457 	regmap_read(clk_regmap, clk->reg, &val);  in clk_pll_is_enabled()
480 	regmap_read(clk_regmap, clk->reg, &val);  in clk_pll_recalc_rate()
579 	return regmap_update_bits(clk_regmap, clk->reg, 0x1FFFF, val);  in clk_pll_set_rate()
718 	regmap_read(clk_regmap, clk->reg, &val);  in clk_ddram_is_enabled()
730 	regmap_read(clk_regmap, clk->reg, &val);  in clk_ddram_enable()
741 	return regmap_update_bits(clk_regmap, clk->reg,  in clk_ddram_enable()
754 	regmap_read(clk_regmap, clk->reg, &val);  in clk_ddram_recalc_rate()
773 	regmap_read(clk_regmap, clk->reg, &val);  in lpc32xx_clk_uart_recalc_rate()
805 		regmap_read(clk_regmap, LPC32XX_CLKPWR_USB_CTRL, &ctrl_val);  in clk_usb_enable()
806 		regmap_update_bits(clk_regmap, LPC32XX_CLKPWR_USB_CTRL,  in clk_usb_enable()
813 			regmap_write(clk_regmap, LPC32XX_CLKPWR_USB_CTRL,  in clk_usb_enable()
831 		regmap_write(clk_regmap, LPC32XX_CLKPWR_USB_CTRL, ctrl_val);  in clk_usb_enable()
845 		regmap_update_bits(clk_regmap, LPC32XX_CLKPWR_USB_CTRL,  in clk_usb_disable()
855 		regmap_read(clk_regmap, LPC32XX_CLKPWR_USB_CTRL, &ctrl_val);  in clk_usb_is_enabled()
890 	return regmap_update_bits(clk_regmap, clk->reg, mask, val);  in lpc32xx_clk_gate_enable()
899 	regmap_update_bits(clk_regmap, clk->reg, mask, val);  in lpc32xx_clk_gate_disable()
908 	regmap_read(clk_regmap, clk->reg, &val);  in lpc32xx_clk_gate_is_enabled()
949 	regmap_read(clk_regmap, divider->reg, &val);  in clk_divider_recalc_rate()
966 		regmap_read(clk_regmap, divider->reg, &bestdiv);  in clk_divider_round_rate()
987 	return regmap_update_bits(clk_regmap, divider->reg,  in clk_divider_set_rate()
1004 	regmap_read(clk_regmap, mux->reg, &val);  in clk_mux_get_parent()
1030 	return regmap_update_bits(clk_regmap, mux->reg,  in clk_mux_set_parent()
1479 	regmap_read(clk_regmap, reg, &val);  in lpc32xx_clk_div_quirk()
1486 	regmap_update_bits(clk_regmap, reg, gate | div_mask, val);  in lpc32xx_clk_div_quirk()
1520 	clk_regmap = regmap_init_mmio(NULL, base, &lpc32xx_scb_regmap_config);  in lpc32xx_clk_init()
1521 	if (IS_ERR(clk_regmap)) {  in lpc32xx_clk_init()
1523 			PTR_ERR(clk_regmap));  in lpc32xx_clk_init()