Lines Matching +full:pll +full:- +full:source

1 // SPDX-License-Identifier: GPL-2.0-or-later
8 #include <linux/clk-provider.h>
60 	 * Source ssp clock from ref_io than ref_xtal,  in clk_misc_init()
66 	 * 480 MHz seems too high to be ssp clock source directly,  in clk_misc_init()
73 static const char *const sel_pll[]  __initconst = { "pll", "ref_xtal", };
81 	ref_xtal, pll, ref_cpu, ref_emi, ref_pix, ref_io, saif_sel,  enumerator
102 	dcnp = of_find_compatible_node(NULL, NULL, "fsl,imx23-digctl");  in mx23_clocks_init()
113 	clks[pll] = mxs_clk_pll("pll", "ref_xtal", PLLCTRL0, 16, 480000000);  in mx23_clocks_init()
114 	clks[ref_cpu] = mxs_clk_ref("ref_cpu", "pll", FRAC, 0);  in mx23_clocks_init()
115 	clks[ref_emi] = mxs_clk_ref("ref_emi", "pll", FRAC, 1);  in mx23_clocks_init()
116 	clks[ref_pix] = mxs_clk_ref("ref_pix", "pll", FRAC, 2);  in mx23_clocks_init()
117 	clks[ref_io] = mxs_clk_ref("ref_io", "pll", FRAC, 3);  in mx23_clocks_init()
139 	clks[spdif_div] = mxs_clk_fixed_factor("spdif_div", "pll", 1, 4);  in mx23_clocks_init()
153 	clks[usb_phy] = clk_register_gate(NULL, "usb_phy", "pll", 0, PLLCTRL0, 18, 0, &mxs_lock);  in mx23_clocks_init()
170 CLK_OF_DECLARE(imx23_clkctrl, "fsl,imx23-clkctrl", mx23_clocks_init);