Lines Matching +full:reg +full:- +full:init
1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include <linux/clk-provider.h>
12 * struct clk_div - mxs integer divider clock
15 * @reg: register address
24 void __iomem *reg; member
40 return div->ops->recalc_rate(&div->divider.hw, parent_rate); in clk_div_recalc_rate()
48 return div->ops->determine_rate(&div->divider.hw, req); in clk_div_determine_rate()
57 ret = div->ops->set_rate(&div->divider.hw, rate, parent_rate); in clk_div_set_rate()
59 ret = mxs_clk_wait(div->reg, div->busy); in clk_div_set_rate()
71 void __iomem *reg, u8 shift, u8 width, u8 busy) in mxs_clk_div() argument
75 struct clk_init_data init; in mxs_clk_div() local
79 return ERR_PTR(-ENOMEM); in mxs_clk_div()
81 init.name = name; in mxs_clk_div()
82 init.ops = &clk_div_ops; in mxs_clk_div()
83 init.flags = CLK_SET_RATE_PARENT; in mxs_clk_div()
84 init.parent_names = (parent_name ? &parent_name: NULL); in mxs_clk_div()
85 init.num_parents = (parent_name ? 1 : 0); in mxs_clk_div()
87 div->reg = reg; in mxs_clk_div()
88 div->busy = busy; in mxs_clk_div()
90 div->divider.reg = reg; in mxs_clk_div()
91 div->divider.shift = shift; in mxs_clk_div()
92 div->divider.width = width; in mxs_clk_div()
93 div->divider.flags = CLK_DIVIDER_ONE_BASED; in mxs_clk_div()
94 div->divider.lock = &mxs_lock; in mxs_clk_div()
95 div->divider.hw.init = &init; in mxs_clk_div()
96 div->ops = &clk_divider_ops; in mxs_clk_div()
98 clk = clk_register(NULL, &div->divider.hw); in mxs_clk_div()