Lines Matching +full:sample +full:- +full:at +full:- +full:reset
1 // SPDX-License-Identifier: GPL-2.0
7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
14 #include <linux/clk-provider.h>
21 * For 98DX4251 Sample At Reset the CPU, DDR and Main PLL clocks are all
22 * defined at the same time
30 * For 98DX3236 Sample At Reset the CPU, DDR and Main PLL clocks are all
31 * defined at the same time
76 if (of_machine_is_compatible("marvell,armadaxp-98dx4251")) in mv98dx3236_get_cpu_freq()
78 else if (of_machine_is_compatible("marvell,armadaxp-98dx3236")) in mv98dx3236_get_cpu_freq()
125 if (of_machine_is_compatible("marvell,armadaxp-98dx4251")) { in mv98dx3236_get_clk_ratio()
128 } else if (of_machine_is_compatible("marvell,armadaxp-98dx3236")) { in mv98dx3236_get_clk_ratio()
134 if (of_machine_is_compatible("marvell,armadaxp-98dx4251")) { in mv98dx3236_get_clk_ratio()
137 } else if (of_machine_is_compatible("marvell,armadaxp-98dx3236")) { in mv98dx3236_get_clk_ratio()
171 of_find_compatible_node(NULL, NULL, "marvell,mv98dx3236-gating-clock"); in mv98dx3236_clk_init()
180 CLK_OF_DECLARE(mv98dx3236_clk, "marvell,mv98dx3236-core-clock", mv98dx3236_clk_init);