Lines Matching +full:dove +full:- +full:gating +full:- +full:clock

1 // SPDX-License-Identifier: GPL-2.0
3  * Marvell Dove SoC clocks
7  * Gregory CLEMENT <gregory.clement@free-electrons.com>
14 #include <linux/clk-provider.h>
18 #include "dove-divider.h"
23  * Dove PLL sample-at-reset configuration
39  * SAR0[11:9]  : CPU to L2 Clock divider ratio
46  * SAR0[15:12] : CPU to DDR DRAM Clock divider ratio
157  * Clock Gating Control
185 		of_find_compatible_node(NULL, NULL, "marvell,dove-gating-clock");  in dove_clk_init()
187 		of_find_compatible_node(NULL, NULL, "marvell,dove-divider-clock");  in dove_clk_init()
201 CLK_OF_DECLARE(dove_clk, "marvell,dove-core-clock", dove_clk_init);