249 	struct pic32_ref_osc *refo = clkhw_to_refosc(hw);  in roclk_is_enabled()  local
251 	return readl(refo->ctrl_reg) & REFO_ON;  in roclk_is_enabled()
256 	struct pic32_ref_osc *refo = clkhw_to_refosc(hw);  in roclk_enable()  local
258 	writel(REFO_ON | REFO_OE, PIC32_SET(refo->ctrl_reg));  in roclk_enable()
264 	struct pic32_ref_osc *refo = clkhw_to_refosc(hw);  in roclk_disable()  local
266 	writel(REFO_ON | REFO_OE, PIC32_CLR(refo->ctrl_reg));  in roclk_disable()
279 	struct pic32_ref_osc *refo = clkhw_to_refosc(hw);  in roclk_get_parent()  local
282 	v = (readl(refo->ctrl_reg) >> REFO_SEL_SHIFT) & REFO_SEL_MASK;  in roclk_get_parent()
284 	if (!refo->parent_map)  in roclk_get_parent()
288 		if (refo->parent_map[i] == v)  in roclk_get_parent()
361 	struct pic32_ref_osc *refo = clkhw_to_refosc(hw);  in roclk_recalc_rate()  local
365 	v = readl(refo->ctrl_reg);  in roclk_recalc_rate()
369 	v = readl(refo->ctrl_reg + REFO_TRIM_REG);  in roclk_recalc_rate()
443 	struct pic32_ref_osc *refo = clkhw_to_refosc(hw);  in roclk_set_parent()  local
448 	if (refo->parent_map)  in roclk_set_parent()
449 		index = refo->parent_map[index];  in roclk_set_parent()
452 	err = readl_poll_timeout(refo->ctrl_reg, v, !(v & REFO_ACTIVE),  in roclk_set_parent()
459 	spin_lock_irqsave(&refo->core->reg_lock, flags);  in roclk_set_parent()
464 	v = readl(refo->ctrl_reg);  in roclk_set_parent()
468 	writel(v, refo->ctrl_reg);  in roclk_set_parent()
470 	spin_unlock_irqrestore(&refo->core->reg_lock, flags);  in roclk_set_parent()
480 	struct pic32_ref_osc *refo = clkhw_to_refosc(hw);  in roclk_set_rate_and_parent()  local
492 	err = readl_poll_timeout(refo->ctrl_reg, v,  in roclk_set_rate_and_parent()
500 	spin_lock_irqsave(&refo->core->reg_lock, flags);  in roclk_set_rate_and_parent()
501 	v = readl(refo->ctrl_reg);  in roclk_set_rate_and_parent()
506 	if (refo->parent_map)  in roclk_set_rate_and_parent()
507 		index = refo->parent_map[index];  in roclk_set_rate_and_parent()
515 	writel(v, refo->ctrl_reg);  in roclk_set_rate_and_parent()
518 	v = readl(refo->ctrl_reg + REFO_TRIM_REG);  in roclk_set_rate_and_parent()
521 	writel(v, refo->ctrl_reg + REFO_TRIM_REG);  in roclk_set_rate_and_parent()
524 	writel(REFO_ON | REFO_DIVSW_EN, PIC32_SET(refo->ctrl_reg));  in roclk_set_rate_and_parent()
527 	err = readl_poll_timeout_atomic(refo->ctrl_reg, v, !(v & REFO_DIVSW_EN),  in roclk_set_rate_and_parent()
530 	writel(REFO_ON, PIC32_CLR(refo->ctrl_reg));  in roclk_set_rate_and_parent()
532 	spin_unlock_irqrestore(&refo->core->reg_lock, flags);  in roclk_set_rate_and_parent()
561 	struct pic32_ref_osc *refo;  in pic32_refo_clk_register()  local
564 	refo = devm_kzalloc(core->dev, sizeof(*refo), GFP_KERNEL);  in pic32_refo_clk_register()
565 	if (!refo)  in pic32_refo_clk_register()
568 	refo->core = core;  in pic32_refo_clk_register()
569 	refo->hw.init = &data->init_data;  in pic32_refo_clk_register()
570 	refo->ctrl_reg = data->ctrl_reg + core->iobase;  in pic32_refo_clk_register()
571 	refo->parent_map = data->parent_map;  in pic32_refo_clk_register()
573 	clk = devm_clk_register(core->dev, &refo->hw);  in pic32_refo_clk_register()