759 /* System mux clock(aka SCLK) */
774 	struct pic32_sys_clk *sclk = clkhw_to_sys_clk(hw);  in sclk_get_rate()  local
777 	div = (readl(sclk->slew_reg) >> SLEW_SYSDIV_SHIFT) & SLEW_SYSDIV;  in sclk_get_rate()
795 	struct pic32_sys_clk *sclk = clkhw_to_sys_clk(hw);  in sclk_set_rate()  local
802 	spin_lock_irqsave(&sclk->core->reg_lock, flags);  in sclk_set_rate()
805 	v = readl(sclk->slew_reg);  in sclk_set_rate()
811 	writel(v, sclk->slew_reg);  in sclk_set_rate()
814 	err = readl_poll_timeout_atomic(sclk->slew_reg, v,  in sclk_set_rate()
817 	spin_unlock_irqrestore(&sclk->core->reg_lock, flags);  in sclk_set_rate()
824 	struct pic32_sys_clk *sclk = clkhw_to_sys_clk(hw);  in sclk_get_parent()  local
827 	v = (readl(sclk->mux_reg) >> OSC_CUR_SHIFT) & OSC_CUR_MASK;  in sclk_get_parent()
829 	if (!sclk->parent_map)  in sclk_get_parent()
833 		if (sclk->parent_map[i] == v)  in sclk_get_parent()
840 	struct pic32_sys_clk *sclk = clkhw_to_sys_clk(hw);  in sclk_set_parent()  local
845 	spin_lock_irqsave(&sclk->core->reg_lock, flags);  in sclk_set_parent()
848 	nosc = sclk->parent_map ? sclk->parent_map[index] : index;  in sclk_set_parent()
851 	v = readl(sclk->mux_reg);  in sclk_set_parent()
857 	writel(v, sclk->mux_reg);  in sclk_set_parent()
860 	writel(OSC_SWEN, PIC32_SET(sclk->mux_reg));  in sclk_set_parent()
867 	err = readl_poll_timeout_atomic(sclk->slew_reg, v,  in sclk_set_parent()
870 	spin_unlock_irqrestore(&sclk->core->reg_lock, flags);  in sclk_set_parent()
873 	 * SCLK clock-switching logic might reject a clock switching request  in sclk_set_parent()
878 	cosc = (readl(sclk->mux_reg) >> OSC_CUR_SHIFT) & OSC_CUR_MASK;  in sclk_set_parent()
890 	struct pic32_sys_clk *sclk = clkhw_to_sys_clk(hw);  in sclk_init()  local
898 	if (sclk->slew_div) {  in sclk_init()
899 		spin_lock_irqsave(&sclk->core->reg_lock, flags);  in sclk_init()
900 		v = readl(sclk->slew_reg);  in sclk_init()
902 		v |= sclk->slew_div << SLEW_DIV_SHIFT;  in sclk_init()
904 		writel(v, sclk->slew_reg);  in sclk_init()
905 		spin_unlock_irqrestore(&sclk->core->reg_lock, flags);  in sclk_init()
911 /* sclk with post-divider */
922 /* sclk with no slew and no post-divider */
933 	struct pic32_sys_clk *sclk;  in pic32_sys_clk_register()  local
936 	sclk = devm_kzalloc(core->dev, sizeof(*sclk), GFP_KERNEL);  in pic32_sys_clk_register()
937 	if (!sclk)  in pic32_sys_clk_register()
940 	sclk->core = core;  in pic32_sys_clk_register()
941 	sclk->hw.init = &data->init_data;  in pic32_sys_clk_register()
942 	sclk->mux_reg = data->mux_reg + core->iobase;  in pic32_sys_clk_register()
943 	sclk->slew_reg = data->slew_reg + core->iobase;  in pic32_sys_clk_register()
944 	sclk->slew_div = data->slew_div;  in pic32_sys_clk_register()
945 	sclk->parent_map = data->parent_map;  in pic32_sys_clk_register()
947 	clk = devm_clk_register(core->dev, &sclk->hw);  in pic32_sys_clk_register()