Lines Matching +full:gxbb +full:- +full:clkc
1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/clk-provider.h>
13 #include "clk-regmap.h"
14 #include "clk-pll.h"
15 #include "clk-mpll.h"
16 #include "meson-clkc-utils.h"
17 #include "vid-pll-div.h"
19 #include <dt-bindings/clock/gxbb-clkc.h>
263 * HHI_HDMI_PLL_CNTL1 which does not exist on gxbb,
264 * so we use the HHI_HDMI_PLL_CNTL2 define from GXBB
640 * GXL and GXBB have different gp0_pll_dco (with
646 .index = -1,
713 * b) CCF has a clock hand-off mechanism to make the sure the
879 * GXL and GXBB have different SDM_EN registers. We
884 .index = -1,
1093 * muxed by a glitch-free switch. The CCF can manage this glitch-free
1094 * mux because it does top-to-bottom updates the each clock tree and
1885 * GXL and GXBB have different hdmi_plls (with
1891 .index = -1,
1902 * GXL and GXBB have different hdmi_plls (with
1907 { .name = "hdmi_pll", .index = -1 },
2734 * - remove the flag if not necessary
2735 * - replace the flag with something more adequate, such as CLK_IS_CRITICAL,
2737 * - add a comment explaining why the use of CLK_IGNORE_UNUSED is desirable
3270 { .compatible = "amlogic,gxbb-clkc", .data = &gxbb_clkc_data },
3271 { .compatible = "amlogic,gxl-clkc", .data = &gxl_clkc_data },
3279 .name = "gxbb-clkc",
3285 MODULE_DESCRIPTION("Amlogic GXBB Main Clock Controller driver");