1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 #include <linux/clk-provider.h>
10 #include "clk-regmap.h"
11 #include "clk-phase.h"
16 meson_clk_phase_data(struct clk_regmap *clk)  in meson_clk_phase_data()  argument
18 	return (struct meson_clk_phase_data *)clk->data;  in meson_clk_phase_data()
39 	struct clk_regmap *clk = to_clk_regmap(hw);  in meson_clk_phase_get_phase()  local
40 	struct meson_clk_phase_data *phase = meson_clk_phase_data(clk);  in meson_clk_phase_get_phase()  local
43 	val = meson_parm_read(clk->map, &phase->ph);  in meson_clk_phase_get_phase()
45 	return meson_clk_degrees_from_val(val, phase->ph.width);  in meson_clk_phase_get_phase()
50 	struct clk_regmap *clk = to_clk_regmap(hw);  in meson_clk_phase_set_phase()  local
51 	struct meson_clk_phase_data *phase = meson_clk_phase_data(clk);  in meson_clk_phase_set_phase()  local
54 	val = meson_clk_degrees_to_val(degrees, phase->ph.width);  in meson_clk_phase_set_phase()
55 	meson_parm_write(clk->map, &phase->ph, val);  in meson_clk_phase_set_phase()
68  * The phase of mst_sclk clock output can be controlled independently
72  * If necessary, we can still control the phase in the tdm block
76 meson_clk_triphase_data(struct clk_regmap *clk)  in meson_clk_triphase_data()  argument
78 	return (struct meson_clk_triphase_data *)clk->data;  in meson_clk_triphase_data()
83 	struct clk_regmap *clk = to_clk_regmap(hw);  in meson_clk_triphase_sync()  local
84 	struct meson_clk_triphase_data *tph = meson_clk_triphase_data(clk);  in meson_clk_triphase_sync()
87 	/* Get phase 0 and sync it to phase 1 and 2 */  in meson_clk_triphase_sync()
88 	val = meson_parm_read(clk->map, &tph->ph0);  in meson_clk_triphase_sync()
89 	meson_parm_write(clk->map, &tph->ph1, val);  in meson_clk_triphase_sync()
90 	meson_parm_write(clk->map, &tph->ph2, val);  in meson_clk_triphase_sync()
97 	struct clk_regmap *clk = to_clk_regmap(hw);  in meson_clk_triphase_get_phase()  local
98 	struct meson_clk_triphase_data *tph = meson_clk_triphase_data(clk);  in meson_clk_triphase_get_phase()
101 	/* Phase are in sync, reading phase 0 is enough */  in meson_clk_triphase_get_phase()
102 	val = meson_parm_read(clk->map, &tph->ph0);  in meson_clk_triphase_get_phase()
104 	return meson_clk_degrees_from_val(val, tph->ph0.width);  in meson_clk_triphase_get_phase()
109 	struct clk_regmap *clk = to_clk_regmap(hw);  in meson_clk_triphase_set_phase()  local
110 	struct meson_clk_triphase_data *tph = meson_clk_triphase_data(clk);  in meson_clk_triphase_set_phase()
113 	val = meson_clk_degrees_to_val(degrees, tph->ph0.width);  in meson_clk_triphase_set_phase()
114 	meson_parm_write(clk->map, &tph->ph0, val);  in meson_clk_triphase_set_phase()
115 	meson_parm_write(clk->map, &tph->ph1, val);  in meson_clk_triphase_set_phase()
116 	meson_parm_write(clk->map, &tph->ph2, val);  in meson_clk_triphase_set_phase()
135 meson_sclk_ws_inv_data(struct clk_regmap *clk)  in meson_sclk_ws_inv_data()  argument
137 	return (struct meson_sclk_ws_inv_data *)clk->data;  in meson_sclk_ws_inv_data()
142 	struct clk_regmap *clk = to_clk_regmap(hw);  in meson_sclk_ws_inv_sync()  local
143 	struct meson_sclk_ws_inv_data *tph = meson_sclk_ws_inv_data(clk);  in meson_sclk_ws_inv_sync()
146 	/* Get phase and sync the inverted value to ws */  in meson_sclk_ws_inv_sync()
147 	val = meson_parm_read(clk->map, &tph->ph);  in meson_sclk_ws_inv_sync()
148 	meson_parm_write(clk->map, &tph->ws, val ? 0 : 1);  in meson_sclk_ws_inv_sync()
155 	struct clk_regmap *clk = to_clk_regmap(hw);  in meson_sclk_ws_inv_get_phase()  local
156 	struct meson_sclk_ws_inv_data *tph = meson_sclk_ws_inv_data(clk);  in meson_sclk_ws_inv_get_phase()
159 	val = meson_parm_read(clk->map, &tph->ph);  in meson_sclk_ws_inv_get_phase()
161 	return meson_clk_degrees_from_val(val, tph->ph.width);  in meson_sclk_ws_inv_get_phase()
166 	struct clk_regmap *clk = to_clk_regmap(hw);  in meson_sclk_ws_inv_set_phase()  local
167 	struct meson_sclk_ws_inv_data *tph = meson_sclk_ws_inv_data(clk);  in meson_sclk_ws_inv_set_phase()
170 	val = meson_clk_degrees_to_val(degrees, tph->ph.width);  in meson_sclk_ws_inv_set_phase()
171 	meson_parm_write(clk->map, &tph->ph, val);  in meson_sclk_ws_inv_set_phase()
172 	meson_parm_write(clk->map, &tph->ws, val ? 0 : 1);  in meson_sclk_ws_inv_set_phase()
183 MODULE_DESCRIPTION("Amlogic phase driver");