Lines Matching +full:c +full:- +full:22
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2025 MediaTek Inc.
5 * Copyright (c) 2025 Collabora Ltd.
8 #include <dt-bindings/clock/mediatek,mt8196-clock.h>
17 #include "clk-mtk.h"
18 #include "clk-pll.h"
96 7, PLL_AO, MAINPLL_CON1, 24, MAINPLL_CON1, 0, 22, 0),
98 6, 0, UNIVPLL_CON1, 24, UNIVPLL_CON1, 0, 22, 1),
100 5, 0, MSDCPLL_CON1, 24, MSDCPLL_CON1, 0, 22, 2),
102 4, 0, ADSPPLL_CON1, 24, ADSPPLL_CON1, 0, 22, 3),
104 PLL_AO, EMIPLL_CON1, 24, EMIPLL_CON1, 0, 22, 4),
106 2, PLL_AO, EMIPLL2_CON1, 24, EMIPLL2_CON1, 0, 22, 5),
108 1, 0, NET1PLL_CON1, 24, NET1PLL_CON1, 0, 22, 6),
110 0, 0, SGMIIPLL_CON1, 24, SGMIIPLL_CON1, 0, 22, 7),
120 6, 0, MAINPLL2_CON1, 24, MAINPLL2_CON1, 0, 22, 0),
122 5, 0, UNIVPLL2_CON1, 24, UNIVPLL2_CON1, 0, 22, 1),
124 4, 0, MMPLL2_CON1, 24, MMPLL2_CON1, 0, 22, 2),
126 3, 0, IMGPLL_CON1, 24, IMGPLL_CON1, 0, 22, 3),
128 2, 0, TVDPLL1_CON1, 24, TVDPLL1_CON1, 0, 22, 4),
130 1, 0, TVDPLL2_CON1, 24, TVDPLL2_CON1, 0, 22, 5),
132 0, 0, TVDPLL3_CON1, 24, TVDPLL3_CON1, 0, 22, 6),
143 struct device_node *node = pdev->dev.of_node; in clk_mt8196_apmixed_probe()
147 mcd = device_get_match_data(&pdev->dev); in clk_mt8196_apmixed_probe()
149 return -EINVAL; in clk_mt8196_apmixed_probe()
151 clk_data = mtk_alloc_clk_data(mcd->num_clks); in clk_mt8196_apmixed_probe()
153 return -ENOMEM; in clk_mt8196_apmixed_probe()
155 r = mtk_clk_register_plls(node, mcd->clks, mcd->num_clks, clk_data); in clk_mt8196_apmixed_probe()
168 mtk_clk_unregister_plls(mcd->clks, mcd->num_clks, clk_data); in clk_mt8196_apmixed_probe()
176 const struct mtk_pll_desc *mcd = device_get_match_data(&pdev->dev); in clk_mt8196_apmixed_remove()
178 struct device_node *node = pdev->dev.of_node; in clk_mt8196_apmixed_remove()
181 mtk_clk_unregister_plls(mcd->clks, mcd->num_clks, clk_data); in clk_mt8196_apmixed_remove()
186 { .compatible = "mediatek,mt8196-apmixedsys", .data = &apmixed_desc },
187 { .compatible = "mediatek,mt8196-apmixedsys-gp2",
197 .name = "clk-mt8196-apmixed",