Lines Matching +full:24 +full:- +full:9
1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <dt-bindings/clock/mediatek,mt8188-clk.h>
11 #include "clk-gate.h"
12 #include "clk-mtk.h"
13 #include "clk-pll.h"
62 0, 0, 22, 0x0450, 24, 0, 0, 0, 0x0450, 0, 0, 0, 9),
64 0, 0, 22, 0x0518, 24, 0, 0, 0, 0x0518, 0, 0, 0, 9),
66 0, 0, 22, 0x0528, 24, 0, 0, 0, 0x0528, 0, 0, 0, 9),
68 0, 0, 22, 0x0538, 24, 0, 0, 0, 0x0538, 0, 0, 0, 9),
70 HAVE_RST_BAR, BIT(23), 22, 0x0548, 24, 0, 0, 0, 0x0548, 0, 0, 0, 9),
72 HAVE_RST_BAR, BIT(23), 22, 0x0460, 24, 0, 0, 0, 0x0460, 0, 0, 0, 9),
74 0, 0, 22, 0x0558, 24, 0, 0, 0, 0x0558, 0, 0, 0, 9),
76 HAVE_RST_BAR, BIT(23), 22, 0x0508, 24, 0, 0, 0, 0x0508, 0, 0, 0, 9),
78 0, 0, 22, 0x0430, 24, 0, 0, 0, 0x0430, 0, 0, 0, 9),
80 0, 0, 32, 0x0308, 24, 0x0034, 0x0000, 12, 0x030C, 0, 0, 0, 9),
82 0, 0, 32, 0x031C, 24, 0x0038, 0x0000, 13, 0x0320, 0, 0, 0, 9),
84 0, 0, 32, 0x0330, 24, 0x003C, 0x0000, 14, 0x0334, 0, 0, 0, 9),
86 0, 0, 32, 0x0408, 24, 0x0040, 0x0000, 15, 0x040C, 0, 0, 0, 9),
88 0, 0, 32, 0x041C, 24, 0x0044, 0x0000, 16, 0x0420, 0, 0, 0, 9),
90 0, 0, 22, 0x0344, 24, 0, 0, 0, 0x0344, 0, 0, 0, 9),
94 { .compatible = "mediatek,mt8188-apmixedsys" },
102 struct device_node *node = pdev->dev.of_node; in clk_mt8188_apmixed_probe()
107 return -ENOMEM; in clk_mt8188_apmixed_probe()
113 r = mtk_clk_register_gates(&pdev->dev, node, apmixed_clks, in clk_mt8188_apmixed_probe()
137 struct device_node *node = pdev->dev.of_node; in clk_mt8188_apmixed_remove()
150 .name = "clk-mt8188-apmixed",