Lines Matching +full:50 +full:- +full:mhz

1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
8 	fixed_50: kunit-clock-50MHz {
9 		compatible = "fixed-clock";
10 		#clock-cells = <0>;
11 		clock-frequency = <50000000>;
12 		clock-output-names = CLK_PARENT_DATA_50MHZ_NAME;
15 	fixed_parent: kunit-clock-1MHz {
16 		compatible = "fixed-clock";
17 		#clock-cells = <0>;
18 		clock-frequency = <1000000>;
19 		clock-output-names = CLK_PARENT_DATA_1MHZ_NAME;
22 	kunit-clock-controller {
23 		compatible = "test,clk-parent-data";
25 		clock-names = CLK_PARENT_DATA_PARENT1, CLK_PARENT_DATA_PARENT2;
26 		#clock-cells = <1>;