52 	u32		div_mask;  member
115 	u32 div = (readl_relaxed(pll->base) >> pll->div_shift)  & pll->div_mask;  in clk_pllv3_recalc_rate()
143 	val &= ~(pll->div_mask << pll->div_shift);  in clk_pllv3_set_rate()
163 	u32 div = readl_relaxed(pll->base) & pll->div_mask;  in clk_pllv3_sys_recalc_rate()
198 	val &= ~pll->div_mask;  in clk_pllv3_sys_set_rate()
220 	u32 div = readl_relaxed(pll->base) & pll->div_mask;  in clk_pllv3_av_recalc_rate()
285 	val &= ~pll->div_mask;  in clk_pllv3_av_set_rate()
353 	mf.mfi = (readl_relaxed(pll->base) & pll->div_mask) ? 22 : 20;  in clk_pllv3_vf610_recalc_rate()
376 		val &= ~pll->div_mask;	/* clear bit for mfi=20 */  in clk_pllv3_vf610_set_rate()
378 		val |= pll->div_mask;	/* set bit for mfi=22 */  in clk_pllv3_vf610_set_rate()
413 			  u32 div_mask)  in imx_clk_hw_pllv3()  argument
471 	pll->div_mask = div_mask;  in imx_clk_hw_pllv3()