1 // SPDX-License-Identifier: GPL-2.0
6 #include <dt-bindings/clock/nxp,imx95-clock.h>
8 #include <linux/clk-provider.h>
63 		.parent_names = (const char *[]){ "vpu", },
282 	struct device *dev = &pdev->dev;  in imx95_bc_probe()
292 		return -ENOMEM;  in imx95_bc_probe()
293 	bc->dev = dev;  in imx95_bc_probe()
294 	dev_set_drvdata(&pdev->dev, bc);  in imx95_bc_probe()
296 	spin_lock_init(&bc->lock);  in imx95_bc_probe()
302 	bc->base = base;  in imx95_bc_probe()
303 	bc->clk_apb = devm_clk_get(dev, NULL);  in imx95_bc_probe()
304 	if (IS_ERR(bc->clk_apb))  in imx95_bc_probe()
305 		return dev_err_probe(dev, PTR_ERR(bc->clk_apb), "failed to get APB clock\n");  in imx95_bc_probe()
307 	ret = clk_prepare_enable(bc->clk_apb);  in imx95_bc_probe()
317 	clk_hw_data = devm_kzalloc(dev, struct_size(clk_hw_data, hws, bc_data->num_clks),  in imx95_bc_probe()
320 		return -ENOMEM;  in imx95_bc_probe()
322 	if (bc_data->rpm_enabled)  in imx95_bc_probe()
323 		pm_runtime_enable(&pdev->dev);  in imx95_bc_probe()
325 	clk_hw_data->num = bc_data->num_clks;  in imx95_bc_probe()
326 	hws = clk_hw_data->hws;  in imx95_bc_probe()
328 	for (i = 0; i < bc_data->num_clks; i++) {  in imx95_bc_probe()
329 		const struct imx95_blk_ctl_clk_dev_data *data = &bc_data->clk_dev_data[i];  in imx95_bc_probe()
330 		void __iomem *reg = base + data->reg;  in imx95_bc_probe()
332 		if (data->type == CLK_MUX) {  in imx95_bc_probe()
333 			hws[i] = clk_hw_register_mux(dev, data->name, data->parent_names,  in imx95_bc_probe()
334 						     data->num_parents, data->flags, reg,  in imx95_bc_probe()
335 						     data->bit_idx, data->bit_width,  in imx95_bc_probe()
336 						     data->flags2, &bc->lock);  in imx95_bc_probe()
337 		} else if (data->type == CLK_DIVIDER) {  in imx95_bc_probe()
338 			hws[i] = clk_hw_register_divider(dev, data->name, data->parent_names[0],  in imx95_bc_probe()
339 							 data->flags, reg, data->bit_idx,  in imx95_bc_probe()
340 							 data->bit_width, data->flags2, &bc->lock);  in imx95_bc_probe()
342 			hws[i] = clk_hw_register_gate(dev, data->name, data->parent_names[0],  in imx95_bc_probe()
343 						      data->flags, reg, data->bit_idx,  in imx95_bc_probe()
344 						      data->flags2, &bc->lock);  in imx95_bc_probe()
348 			dev_err(dev, "failed to register: %s:%d\n", data->name, ret);  in imx95_bc_probe()
353 	ret = of_clk_add_hw_provider(dev->of_node, of_clk_hw_onecell_get, clk_hw_data);  in imx95_bc_probe()
359 		of_clk_del_provider(dev->of_node);  in imx95_bc_probe()
363 	if (pm_runtime_enabled(bc->dev))  in imx95_bc_probe()
364 		clk_disable_unprepare(bc->clk_apb);  in imx95_bc_probe()
369 	for (i = 0; i < bc_data->num_clks; i++) {  in imx95_bc_probe()
375 	if (bc_data->rpm_enabled)  in imx95_bc_probe()
376 		pm_runtime_disable(&pdev->dev);  in imx95_bc_probe()
386 	clk_disable_unprepare(bc->clk_apb);  in imx95_bc_runtime_suspend()
394 	return clk_prepare_enable(bc->clk_apb);  in imx95_bc_runtime_resume()
409 	if (bc_data->rpm_enabled) {  in imx95_bc_suspend()
410 		ret = pm_runtime_get_sync(bc->dev);  in imx95_bc_suspend()
412 			pm_runtime_put_noidle(bc->dev);  in imx95_bc_suspend()
417 	bc->clk_reg_restore = readl(bc->base + bc_data->clk_reg_offset);  in imx95_bc_suspend()
431 	writel(bc->clk_reg_restore, bc->base + bc_data->clk_reg_offset);  in imx95_bc_resume()
433 	if (bc_data->rpm_enabled)  in imx95_bc_resume()
434 		pm_runtime_put(bc->dev);  in imx95_bc_resume()
446 	{ .compatible = "nxp,imx95-camera-csr", .data = &camblk_dev_data },
447 	{ .compatible = "nxp,imx95-display-master-csr", },
448 	{ .compatible = "nxp,imx95-lvds-csr", .data = &lvds_csr_dev_data },
449 	{ .compatible = "nxp,imx95-display-csr", .data = &dispmix_csr_dev_data },
450 	{ .compatible = "nxp,imx95-vpu-csr", .data = &vpublk_dev_data },
451 	{ .compatible = "nxp,imx95-netcmix-blk-ctrl", .data = &netcmix_dev_data},
459 		.name = "imx95-blk-ctl",