Lines Matching +full:nand +full:- +full:sel

1 // SPDX-License-Identifier: GPL-2.0
7 #include <dt-bindings/clock/imx8mq-clock.h>
8 #include <linux/clk-provider.h>
286 	struct device *dev = &pdev->dev;  in imx8mq_clocks_probe()
287 	struct device_node *np = dev->of_node;  in imx8mq_clocks_probe()
293 		return -ENOMEM;  in imx8mq_clocks_probe()
295 	clk_hw_data->num = IMX8MQ_CLK_END;  in imx8mq_clocks_probe()
296 	hws = clk_hw_data->hws;  in imx8mq_clocks_probe()
307 	np = of_find_compatible_node(NULL, NULL, "fsl,imx8mq-anatop");  in imx8mq_clocks_probe()
397 	np = dev->of_node;  in imx8mq_clocks_probe()
427 	/* CORE SEL */  in imx8mq_clocks_probe()
454 	 * DRAM clocks are manipulated from TF-A outside clock framework.  in imx8mq_clocks_probe()
483 	hws[IMX8MQ_CLK_NAND] = imx8m_clk_hw_composite("nand", imx8mq_nand_sels, base + 0xab00);  in imx8mq_clocks_probe()
549 …hws[IMX8MQ_CLK_RAWNAND_ROOT] = imx_clk_hw_gate2_shared2("nand_root_clk", "nand", base + 0x4300, 0,…  in imx8mq_clocks_probe()
594 					   hws[IMX8MQ_CLK_A53_CORE]->clk,  in imx8mq_clocks_probe()
595 					   hws[IMX8MQ_CLK_A53_CORE]->clk,  in imx8mq_clocks_probe()
596 					   hws[IMX8MQ_ARM_PLL_OUT]->clk,  in imx8mq_clocks_probe()
597 					   hws[IMX8MQ_CLK_A53_DIV]->clk);  in imx8mq_clocks_probe()
618 	{ .compatible = "fsl,imx8mq-ccm" },
627 		.name = "imx8mq-ccm",
638 MODULE_PARM_DESC(mcore_booted, "See Cortex-M core is booted or not");