13  * struct clk_gate_exclusive - i.MX specific gate clock which is mutually
14  * exclusive with other gate clocks
16  * @gate: the parent class
17  * @exclusive_mask: mask of gate bits which are mutually exclusive to this
18  *	gate clock
20  * The imx exclusive gate clock is a subclass of basic clk_gate
21  * with an addtional mask to indicate which other gate bits in the same
22  * register is mutually exclusive to this gate clock.
25 	struct clk_gate gate;  member
31 	struct clk_gate *gate = to_clk_gate(hw);  in clk_gate_exclusive_enable()  local
32 	struct clk_gate_exclusive *exgate = container_of(gate,  in clk_gate_exclusive_enable()
33 					struct clk_gate_exclusive, gate);  in clk_gate_exclusive_enable()
34 	u32 val = readl(gate->reg);  in clk_gate_exclusive_enable()
62 	struct clk_gate *gate;  in imx_clk_hw_gate_exclusive()  local
73 	gate = &exgate->gate;  in imx_clk_hw_gate_exclusive()
81 	gate->reg = reg;  in imx_clk_hw_gate_exclusive()
82 	gate->bit_idx = shift;  in imx_clk_hw_gate_exclusive()
83 	gate->lock = &imx_ccm_lock;  in imx_clk_hw_gate_exclusive()
84 	gate->hw.init = &init;  in imx_clk_hw_gate_exclusive()
87 	hw = &gate->hw;  in imx_clk_hw_gate_exclusive()
91 		kfree(gate);  in imx_clk_hw_gate_exclusive()