1 // SPDX-License-Identifier: GPL-2.0+
8 #include <linux/clk-provider.h>
20  * 0b000 - LPCG will be OFF in any CPU mode.
21  * 0b100 - LPCG will be ON in any CPU mode.
37 	void __iomem	*reg;  member
52 	val = readl(gate->reg + AUTHEN_OFFSET);  in imx93_clk_gate_do_hardware()
55 		writel(val, gate->reg + LPM_CUR_OFFSET);  in imx93_clk_gate_do_hardware()
57 		val = readl(gate->reg + DIRECT_OFFSET);  in imx93_clk_gate_do_hardware()
58 		val &= ~(gate->mask << gate->bit_idx);  in imx93_clk_gate_do_hardware()
60 			val |= (gate->val & gate->mask) << gate->bit_idx;  in imx93_clk_gate_do_hardware()
61 		writel(val, gate->reg + DIRECT_OFFSET);  in imx93_clk_gate_do_hardware()
70 	spin_lock_irqsave(gate->lock, flags);  in imx93_clk_gate_enable()
72 	if (gate->share_count && (*gate->share_count)++ > 0)  in imx93_clk_gate_enable()
77 	spin_unlock_irqrestore(gate->lock, flags);  in imx93_clk_gate_enable()
87 	spin_lock_irqsave(gate->lock, flags);  in imx93_clk_gate_disable()
89 	if (gate->share_count) {  in imx93_clk_gate_disable()
90 		if (WARN_ON(*gate->share_count == 0))  in imx93_clk_gate_disable()
92 		else if (--(*gate->share_count) > 0)  in imx93_clk_gate_disable()
98 	spin_unlock_irqrestore(gate->lock, flags);  in imx93_clk_gate_disable()
103 	u32 val = readl(gate->reg + AUTHEN_OFFSET);  in imx93_clk_gate_reg_is_enabled()
106 		val = readl(gate->reg + LPM_CUR_OFFSET);  in imx93_clk_gate_reg_is_enabled()
110 		val = readl(gate->reg);  in imx93_clk_gate_reg_is_enabled()
111 		if (((val >> gate->bit_idx) & gate->mask) == gate->val)  in imx93_clk_gate_reg_is_enabled()
124 	spin_lock_irqsave(gate->lock, flags);  in imx93_clk_gate_is_enabled()
128 	spin_unlock_irqrestore(gate->lock, flags);  in imx93_clk_gate_is_enabled()
138 	spin_lock_irqsave(gate->lock, flags);  in imx93_clk_gate_disable_unused()
140 	if (!gate->share_count || *gate->share_count == 0)  in imx93_clk_gate_disable_unused()
143 	spin_unlock_irqrestore(gate->lock, flags);  in imx93_clk_gate_disable_unused()
158 			      unsigned long flags, void __iomem *reg, u32 bit_idx, u32 val,  in imx93_clk_gate()  argument
163 	struct clk_init_data init;  in imx93_clk_gate()  local
169 		return ERR_PTR(-ENOMEM);  in imx93_clk_gate()
171 	gate->reg = reg;  in imx93_clk_gate()
172 	gate->lock = &imx_ccm_lock;  in imx93_clk_gate()
173 	gate->bit_idx = bit_idx;  in imx93_clk_gate()
174 	gate->val = val;  in imx93_clk_gate()
175 	gate->mask = mask;  in imx93_clk_gate()
176 	gate->share_count = share_count;  in imx93_clk_gate()
178 	init.name = name;  in imx93_clk_gate()
179 	init.ops = &imx93_clk_gate_ops;  in imx93_clk_gate()
180 	init.flags = flags | CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE;  in imx93_clk_gate()
181 	init.parent_names = parent_name ? &parent_name : NULL;  in imx93_clk_gate()
182 	init.num_parents = parent_name ? 1 : 0;  in imx93_clk_gate()
184 	gate->hw.init = &init;  in imx93_clk_gate()
185 	hw = &gate->hw;  in imx93_clk_gate()
187 	authen = readl(reg + AUTHEN_OFFSET);  in imx93_clk_gate()
189 		init.ops = &imx93_clk_gate_ro_ops;  in imx93_clk_gate()